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173 topics in this forum

  1. DigitalOut with Python

    By Bayu A,
    • 0 replies
    • 69 views

  2. Add a Microblaze Processor to a Block Design

    By Deepa V,
    • 1 reply
    • 382 views

  3. Second Order Sigma Delta DACs implemented in a FPGA.

    By hamster,
    • 12 replies
    • 3.9k views

  4. BoxLambda, a Arty/Nexys A7-based retro-style microcomputer

    By epsilon,
    • 4 replies
    • 458 views

  5. FPGA IIC HYGRO tester: IPI-BD and Verilog

    By Tim S.,
    • 2 replies
    • 911 views

  6. A new teaching operating system on Arty A7

    By Yunhao,
    • 1 reply
    • 500 views

  7. Arty A7 100 UART echo example

    By silantyeved,
    • 6 replies
    • 546 views

  8. SPI Memory Tester: IPI-BD for Zynq

    By Tim S.,
    • 4 replies
    • 2.3k views

  9. SPI Memory Tester: IPI-BD and VHDL

    By Tim S.,
    • 4 replies
    • 2.1k views

  10. Compiling custom module exported from Vivado for Zybo z7 10.

    By Vas,   
    • 1 reply
    • 330 views

  11. Magellan HW monitor for Basys 3 board

    By chclau,   
    • 0 replies
    • 237 views

  12. A custom DDR3 controller for the S7-50 board

    By jb9631,   
    • 6 replies
    • 924 views

  13. FPGA Colors Palette Tester

    By Tim S.,
    • 2 replies
    • 977 views

  14. Prototyping a custom 16-bit processor on an Arty Z7-20

    By rehsd,
    • 2 replies
    • 481 views

  15. MuxSSD driver for the Pmod SSD

    By Tim S.,
    • 2 replies
    • 2.2k views

  16. Refresh of the FPGA Serial Accelerometer Tester

    By Tim S.,
    • 3 replies
    • 542 views

  17. Connecting the Nexys A7 board to an IoT Service Through the Ethernet Port

    By Jonno,   
    • 2 replies
    • 533 views

  18. Converting Nexys A7-100T Raw Temperature Data Output to BCD

    By Jonno,
    • 2 replies
    • 311 views

  19. Cmod A7-35T Demo Project 1 2

    By zygot,
    • 27 replies
    • 12.2k views

  20. Arduino uno +STONE LCD + Display data read by MFRC522

    By Ardelle Froeliger,
    • 1 reply
    • 578 views

  21. Integrated portable development environment

    By leonvs,
    • 0 replies
    • 307 views

  22. Ben Eater's 8-bit CPU in VHDL

    By rehsd,
    • 0 replies
    • 538 views

  23. capture ethernet data and send it to Pmod wifi module in arty A7-35T

    By pulkit,
    • 0 replies
    • 598 views

  24. Eclypse Z-7 ADC1410

    By summer,
    • 8 replies
    • 1.6k views

  25. Ethernet/IPV4/UDP Basys3

    By FlyingBlindOnARocketCycle,   
    • 9 replies
    • 1.8k views
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