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Found 13 results

  1. Hello, I have just recieved my new board and jumped into the example tutorials using Vivado (2 hours to install) only to find when you get to launching the SDK that is is no longer there. Now you need Vitis (3 more hours install) but I am not finding much support in how to develop for a beginner. Can anyone point me to reasonable guides that are specific to the Zybo Z7? Thanks
  2. Hi Guys, My application on linux requires two ethernet ports on the Zybo Z7 board. So I have recently bought a Pmod NIC100 card. I read the references and I have enabled the encx24j600 driver in the xilinx linux kernel. I have enabled SPI0 controller in vivado for the Z7 board. Correct me if I am wrong, but I reckon to use the enabled encx24j600 driver, I have to add the interrupts and registers under spi parent in the device tree but I don't know the specifics of what I have to add. Can someone please help me out? My intention is to get this board to appear as eth1 in xilinx linux. I would appreciate any other way than device tree method to do this as well. Let me know if you need any other information.
  3. Hello everyone, Just a quick question: is the ADP5052 pmic on Zybo monitoring all the voltage outputs (for PGOOD) or only the first channel (3V3)? Thank you in advance! Greetings, Peter
  4. I'm trying to use the hdmi output of my zybo z7-20 with pure HDL. I start with a very simple design which fills the screen with green (or so I intended). The design is as simple as connecting 3 IP cores: clocking wizard, video time controller and digilent's rgb2dvi. However, when I connect the board to a monitor, the monitor does not recognise a valid signal. I tried the HDMI demo and it worked so it is not a hardware issue. What am I doing wrong here?
  5. Hello, I have been successful in running the lwIP echo server on the Zybo Z7 board. However, I want to develop a web server on Zynq. I have gone through the lwIP documentation. However, in the discussion of this topic, I was successful in reading the .bin file from the SD card. Now I want to set up a web server on Zynq so I can command the server to read the .bin file from SD card and store it in the DDR. How do I start working on the web server. I have been searching a lot for the tutorial or anything that could make me understand in a simpler way but I failed to find any.! I also tried understanding the echo server C code in sdk however, after a point it seems too confusing to me. I could even think of modifying the echo server C code to develop a web server with some help, may be. The documentation of lwIP is confusing to me at this point.... Thanks, Shyama.
  6. Hi, There is IMHO a wrong calculation of R316 (4.7k) and R317 (1k) from the over-voltage protection for the EFUSE (IC26). According to the reference manual manual of the Zybo-Z7, the maximal input voltage should be 5.7V. But that's not correct. The maximal input voltage is between 5.244V and 5.643V before the EFUSE cuts of the supply from the board. Please take a look in the datasheet from the EFUSE. The negative input from the internal comparator could be between 0.92V and 0.99V. With these two values and the current values of R316 and R317 (without calculated tolerances) the maximum input voltage is between 5.643V (internal comparator input at 0.99V) and 5.244V (internal comparator input at 0.92V). Please can you verify these? And if my calculations correct, update (add a information) the reference manual?
  7. Pier

    zybo dma demo

    Hi , in none of the repos connected i can find the file zybo-z7-10-dma.xpr you mention in the instructions. eventually could you send a script for the block design ? Thanks
  8. Pier

    Zybo z7 evaluation

    How could be possible to implement the design shown in attached video? in the video the arrays are 600 samples each, but i would go for bigger arrays as possible and 24 or 32 bit values i'm planning to use a zybo z7 board exxample.mp4
  9. Hope you all are fine, I downloaded Digilent/Zybo-Z7-20-HDMI from https://github.com/Digilent/Zybo-Z7-20-HDMI I have upgraded the ip's, it was displaying output on monitor. Then I have created the ip of sobel edge detection and added the ip in block diagram. After solving some clocking issues, bitstream has been generated. After launching to sdk, when I Launch on Hardware (System Debugger), output doesn't display. Below is block diagram, please guide me
  10. Hi there, I have been not having luck in reading the aux pins on the zybo z7 board. I have setup the system as below: The XADC is setup with DRP and channel sequencer in continuous mode, with the setup as below: I can read the voltages on the XADC system monitor dashboard as below: But the XADC only read 0x5999 on Aux 15 Pin, as seen below: As you will see above, Aux 6 and Aux 14 is stuck at 0x5999 and Aux 7 and Aux 15 is fixed at 0x5111. I don't get any errors only a critical warning: [Timing 38-282] The design failed to meet the timing requirements. Please see the timing summary report for details on the timing violations. I have been debugging this for two days now and I am unable to fix this issue. So any help to get the analog inputs on aux pins converted is greatly appreciated! Cheers, Gautam.
  11. Hi, Before I embark on creating my own model I thought I would ask if there is a Step file available for the above mentioned Zybo Z7 board. I have an action to build an enclosure around it (unless someone can point me to one that is available for sale) and the CAD model would be a huge time savings. Many thanks
  12. We are using PL section of the Zynq7000 to transfer data to another module b y creating a SPI IP Inside the PL. We want to know that the PMOD pins availvalble on the Zybo-Z710 board are using open drain or push-pull configuration ? Do they have something like a internal pull-up resistor ? Please let me know.. Regards Amol
  13. Dear all, I'm using Vivado 2018.3 and a Zybo Z7010 board. I have finally finished my project (I actually owe this forum much), and I am now trying to use the board without having to open nor Vivado neither the SDK. Basically, I know that I can program the QSPI flash memory of the board so that the program can run without having to upload it. How this works is still unclear, is switching from JTAG to QSPI enough or should I do something on Vivado? However, I am also using the Zynq processor which runs an application that I start from the SDK. Can I avoid opening the SDK? The better thing would be if I could programm the FPGA through Matlab but I don't know if this is possible. Could you point me to some tutorials or the matlab functions (if they exist...). Thank you very much, NotMyCupOfTea