SPI Memory Tester: IPI-BD and VHDL

[Tim S.]

Hi to the community. I would like to mention that I have posted a FPGA design that memory byte tests the Pmod SF3 with 256Mbit N25Q flash chip.

You can find a link to this project at http://timothystotts.github.io/.

The name of the project is fpga-serial-mem-tester-1 .

The project sources contain some features beyond testing the QSPI flash chip.

Regards,

Tim S.

[Tim S.]

Hi to the community. As with the SPI Accelerometer project, I created a top-level architecture diagram of this project, the Serial Flash Memory Tester. It could help a person decide if there are reusable modules for their own project.

Regards,

Tim S.

[Tim S.]

Hi to the community. The GitHub repository now has a section for Lab Verification of the Pmod busses. SPI values are captured with Waveforms as digital logic analyzer to a Pmod TPH2. I authored a Python script that will translate Pmod CLS SPI bus activity and Pmod SF3 SPI bus activity (in separate files) into human-readable statements of the bus transfers.

The script:

https://github.com/timothystotts/fpga-serial-mem-tester-1/blob/master/Lab-Verification/display_pmod_parse_from_spi_spy.py

Example data inputs and outputs:

https://github.com/timothystotts/fpga-serial-mem-tester-1/tree/master/Lab-Verification/SF-Tester-Design-VHDL

Regards,

Tim S.

[Tim S.]

This project was upgraded to Vivado/Vitis 2020.2 .

[Tim S.]

Now with support for:

    Digilent Inc. Arty S7-25 FPGA development board containing a small Xilinx Spartan-7 FPGA
    Digilent Inc. Arty A7-100 FPGA development board containing a large Xilinx Artix-7 FPGA
    Digilent Inc. Zybo Z7-20 APSoC development board containing a moderate Xilinx Zynq-7000 SoC.

Note that this project is kept as a intermediate-level design that students, hobbyists, and FPGA enthusiasts may find interesting.

The previous FPGA Serial Memory Tester projects were combined into one project using Vivado/Vitis 2021.2. You can find it at:

https://github.com/timothystotts/fpga-serial-mem-tester-3

Note that for the two Arty boards, three examples are available: IPI-BD MicroBlaze, VHDL RTL, and SystemVerilog RTL.