SPI Memory Tester: IPI-BD for Zynq

[Tim S.]

Hello again to the community.

I converted my Arty-A7-100 project of a SPI Memory Tester to execute on a Zybo-Z7-20. The design is in Xilinx Vivado and Vitis 2020.1 .

You can find a link to the project on my GitHub home page.

https://timothystotts.github.io/#fpga-serial-mem-tester-2

Regards,

Tim S.

[JColvin]

Hi @Tim S.,

Thank you for sharing this project!

Do you mind if we link to this post as a community project on different Digilent Wiki pages, such as on the Zybo Z7-20 and Arty A7 Resource Centers?

Thanks,
JColvin

[Tim S.]

Hi @JColvin,

I'd be glad to have the project(s) shared with the community on Digilent's own Wiki pages.

Note that I'll do my best to keep the Git repository copacetic.

Thanks!

Tim S.

[Tim S.]

This project was upgraded to Vivado/Vitis 2020.2 .

[Tim S.]

Now with support for:

    Digilent Inc. Arty S7-25 FPGA development board containing a small Xilinx Spartan-7 FPGA
    Digilent Inc. Arty A7-100 FPGA development board containing a large Xilinx Artix-7 FPGA
    Digilent Inc. Zybo Z7-20 APSoC development board containing a moderate Xilinx Zynq-7000 SoC.

Note that this project is kept as a intermediate-level design that students, hobbyists, and FPGA enthusiasts may find interesting.

The previous FPGA Serial Memory Tester projects were combined into one project using Vivado/Vitis 2021.2. You can find it at:

https://github.com/timothystotts/fpga-serial-mem-tester-3

Note that for the two Arty boards, three examples are available: IPI-BD MicroBlaze, VHDL RTL, and SystemVerilog RTL.