Tim S. Posted July 18, 2020 Share Posted July 18, 2020 I authored a minimal Vivado IP design to control a single Pmod SSD with extension cable on a single jack of a FPGA board. The IP is called MuxSSD and allows writing either digit at any time with no need to use a fast GPIO trick in the application C code. This driver is part of my previously mentioned Accelerometer Tester design. The project is hosted at: https://github.com/timothystotts/fpga-serial-acl-tester-1 . Tim S. JColvin 1 Link to comment Share on other sites More sharing options...
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