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JColvin

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  1. Like
    JColvin got a reaction from Sushant Sharma in How to restore FT2232 EEPROM back to factory settings?   
    Hi @Sushant Sharma,
    I have sent you a PM.
    Thanks,
    JColvin
  2. Like
    JColvin reacted to scootergarrett in Analog Discovery 2 vs Raspberry Pi 3   
    The AD2 working with the pi4 is THE BEST.  Because I complained about it not working a long time ago I should praise it working now.
  3. Like
    JColvin got a reaction from namn in JTAG-HS3, FT232 chip erased   
    Hi @namn,
    I have sent you a PM.
    Thanks,
    JColvin
  4. Like
    JColvin got a reaction from engi in Pmod VGA on Nexys Video   
    Hi @fp99,
    You don't need to do anything particularly different.
    We have a demo for the Pmod VGA on the Zybo Z7 that uses two differential Pmod ports on the Zybo Z7 (https://reference.digilentinc.com/learn/programmable-logic/tutorials/zybo-z7-pmod-vga-demo/start) and looking at the .xdc for the project (https://github.com/Digilent/Zybo-Z7-20-Pmod-VGA/blob/master/src/constraints/Zybo-Z7-Master.xdc) there is not anything fancy done for those differential ports, just the normal naming of the pins to match the name of the signal used in the design.
    Thanks,
    JColvin
  5. Like
    JColvin got a reaction from San in OpenScope and OpenLogger Retired   
    Hi @San,
    I got confirmation that the source code I pointed to is the same source code used the the iOS and Android apps. When building the project, you will just need to specify the platform to be used or it will default to browser.
    Thanks,
    JColvin
  6. Like
    JColvin got a reaction from Sanyika in PMOD SD with Vivado 2020.1 & Vitis 2020.1   
    Hi @Sanyika,
    I apologize; the updated libraries are available here: https://github.com/Digilent/vivado-library/tree/v2020.1. I know the 2020.1 version of the Digilent Vivado library is being updated though so I'm hesitant to link to one of the branches in the tutorial.
    I attempted to run this project as well in 2020.1, but got the same errors you did, so I believe the Pmod SD has not yet been updated to work with 2020.1 and Vitis (as you can see from the makefile errors in Vitis). I am not certain when it will be updated, though I do know that I successfully created and ran a Pmod SD project the other day with Vivado 2019.1.
    Thank you,
    JColvin
  7. Like
    JColvin reacted to Tim S. in FPGA IIC HYGRO tester: IPI-BD and Verilog   
    Hi to the community.
    I have posted on GitHub a FPGA design that polls the Pmod HYGRO via IIC and displays the sensor readings on the Pmod CLS.
    https://timothystotts.github.io/2020/09/12/hygro-sensor-readings-tester-on-arty-a7.html
    Regards,
    Tim S.
  8. Like
    JColvin got a reaction from Edocecrous in Arty A7 basic IO problem   
    Hello,
    This is also detailed a little bit more in our Getting Started with Vivado IP Integrator and Vitis guide in this section here.
    Thanks,
    JColvin
  9. Like
    JColvin reacted to Brent in Programming FPGA Boards from a Mac   
    Follow Up and Summary - Programming FPGA Boards from a Mac
    Thanks to those who responded to my request for methods for programming FPGA boards on a Mac.  
    Since then I have found a mechanism that is working very well.  It is called Open OCD (search the web).  This is an open source solution that we have tested on a number of Digilent boards (Nexys4, Basys3, Arty).  
    It works for both a Mac as well as Linux (useful since we could never get Adept 2 installed in a way to work on Ubuntu 16.04).
    I have created a web page that describes how to use it at: https://github.com/byu-cpe/BYU-Computing-Tutorials/wiki/Program-7-Series-FPGA-from-a-Mac-or-Linux-Without-Xilinx
    Feedback appreciated.
     
     
  10. Like
    JColvin reacted to Tim S. in SPI Memory Tester: IPI-BD for Zynq   
    Hi @JColvin,
    I'd be glad to have the project(s) shared with the community on Digilent's own Wiki pages.
    Note that I'll do my best to keep the Git repository copacetic.
    Thanks!
    Tim S.
  11. Like
    JColvin reacted to Tim S. in MuxSSD driver for the Pmod SSD   
    I authored a minimal Vivado IP design to control a single Pmod SSD with extension cable on a single jack of a FPGA board. The IP is called MuxSSD and allows writing either digit at any time with no need to use a fast GPIO trick in the application C code.
    This driver is part of my previously mentioned Accelerometer Tester design.
    The project is hosted at: https://github.com/timothystotts/fpga-serial-acl-tester-1 .
    Tim S.
  12. Like
    JColvin reacted to Tim S. in SPI Memory Tester: IPI-BD and VHDL   
    Hi to the community. I would like to mention that I have posted a FPGA design that memory byte tests the Pmod SF3 with 256Mbit N25Q flash chip.
    You can find a link to this project at http://timothystotts.github.io/.
    The name of the project is fpga-serial-mem-tester-1 .
    The project sources contain some features beyond testing the QSPI flash chip.
    Regards,
    Tim S.
  13. Like
    JColvin reacted to zygot in Capture 4 channels of 120+ million ADC samples   
    Stay tuned to the Project Vault forum. Now that Digilent lets me play with well designed modules that do conversion between the analog and digital realms with a reasonable bandwidth on Xilinx hardware there are all sorts of fun ideas to explore.
  14. Like
    JColvin reacted to Adrian3 in Basys3 Game Tutorials - BeeInvaders   
    Tutorial 3
    This is the third part of my tutorial and I have attached the associated files / welcome any suggestions or comments
    Tutorial3 Basys 3.pdf Sprite Sheet.xcf Top.v vga640x480.v BeeSprite.v BeeRom.v AlienSprites.v Alien1Rom.v Alien2Rom.v Alien3Rom.v basys3.xdc
  15. Like
    JColvin reacted to Adrian3 in Basys3 Game Tutorials - BeeInvaders   
    Tutorial 2
    This is the second part of my tutorial for creating the "BeeInvaders" game.
    I have attached Tutorial 2, the associated files and welcome any suggestions.
    Tutorial2 Basys 3.pdf Sprite Sheet.xcf Top.v vga640x480.v BeeSprite.v BeeRom.v Bee.mem
  16. Like
    JColvin reacted to Adrian3 in Basys3 Game Tutorials - BeeInvaders   
    Tutorial 1
    This is the first part of a tutorial for creating a game called "BeeInvaders" on the Basys3 board.
    It will require connecting the board to a VGA screen or monitor to test each tutorial.
    I have attached Tutorial 1 / the Verilog code files and would welcome any suggestions to improve the code, along with details of any testbenches. 
    Hope this is helpful to anyone who is new to FPGA.
    Tutorial1 Basys 3.pdf Top.v vga640x480.v basys3.xdc pal24bit.mem
  17. Like
    JColvin got a reaction from Victor in Text editor nano for Zybo   
    Hi @Victor,
    This isn't specifically for the Nano text editor, but this Xilinx forum thread should be of help to you: https://forums.xilinx.com/t5/Embedded-Linux/How-to-add-applications-to-petalinux/td-p/490012.
    Thanks,
    JColvin
  18. Like
    JColvin reacted to Bianca in How to restore FT2232 EEPROM back to factory settings?   
    Hi @svet-am,
    This solution works just for the Digilent boards. Please contact Xilinx for support in order to fix your KCU1500 board.
    Best regards,
    Bianca
  19. Like
    JColvin got a reaction from Tejna in Embedded Linux Question Disclaimer   
    Hello!
    Welcome to the Digilent Forums! All of us here, both Digilent Staff and our incredible community members, are excited to be able to help you out with your project. 
    That being said, we are not the ultimate experts on Embedded Linux. A couple of us have a decent amount of experience, but unfortunately we cannot guarantee that we can identify the issue and have the solution to your problem for your exact distro, drivers, board, and application. We will try to help out the best that we can, but it may take some additional time to provide feedback on any questions that you may have.
    Thanks,
    The Digilent Team
  20. Like
    JColvin got a reaction from Franky32 in How to restore FT2232 EEPROM back to factory settings?   
    Hi @jfranz-argo, @kharoonian, and @Franky32,
    I apologize for the delay. I have sent each of you a PM about this.
    Thanks,
    JColvin
    P.S. to other readers, be sure not have Digilent boards attached when you are reprogramming other FTDI devices. A long list of users will tell you it's an easy mistake to accidentally select the wrong device.
  21. Like
    JColvin reacted to KeithRussell in I think it's broken   
    I ordered an ADG612 on Monday from Mouser and it came yesterday. I put in the new part, ran the calibration, and everything works great. 
    Thanks for the help, Attila.
  22. Like
    JColvin reacted to fonak in Suggestion for improving the impedance analyzer   
    WOW !
    WaveFoms Beta 3.10.2 is out, and has almost all the features I asked for (and much more) ?
     
     Impedance Analyzer:
        - voltage, current and custom plots
        - edit Meter list
        - Resistance mode for Meter, Frequency DC option
        - step mode in Time view
     Netowrk Analyzer:
        - step mode in Time and FFT views
        - amplitude table and custom function
    Thank you very, very much attila.
    WaveForms is a great software and Digilent is a very good company that cares about the customer
  23. Like
    JColvin reacted to jpeyron in JTAG-HS2 firmware erased by accident   
    Hi @albert.zzz,
    I have sent you a PM about this.
    cheers,
    Jon
  24. Like
    JColvin reacted to jpeyron in DXF/CAD files for CORA Z7 board   
    Hi @Erickson,
    The header is arduino/chipkit compatible as discussed in the Reference manual here in section 13 Arduino/chipKIT Shield Connector. The header has more available pins than the Arduino uno as shown here . The Arty A7 has the same header and we have a 3D CAD file available for the Arty-A7  on the bottom of the resource center here.
    thank you,
    Jon
  25. Like
    JColvin reacted to zygot in Cmod A7-35T Demo Project   
    Hi  @abd,
    Part of the CMODA35T demo was indeed integrated into an IP form. The source for that code is not currently in a release form. The objective of the demo is to provide an alternate, quick and painless way for individuals new to the Xilinx toolset to create a bitstream and see their new CMOD-A35T working. Please understand that there aren't many people getting paid to provide code or assistance around here; so there's that pesky trade-off of providing something for free and providing something intended to better the "community".
    The more important purpose of the demo is to encourage users to try developing their VHDL skills; so providing a bit of motivation to have them design their own functionality isn't a bad thing from my perspective. There is plenty of HDL source available in the Digilent Project Vault to assist in this process. Of course, there are also a number of people willing to help with specific questions on this forum as well.
    I realise that developing you own code base ( IP if you will ) is a daunting task for those getting started and using the development methods that Xilinx and Digilent prefer appear to be an easier short cut to working designs. I'm encouraging the longer, more difficult, path because I believe that the destination is a much better place to operate in. There are other forums within the Digilent ecosystem that offer a discussion of ideas and might be interesting or even perhaps useful.
    I do thank you for mentioning that you tried out the demo. I have been encouraged to submit new projects to the Vault and always try to allow users to expand on the project's limited objectives by re-using source. 
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