Arty A7 basic IO problem

[Edocecrous]

Hi,

On my Arty A7 board i have the hello world running with Microblaze and UART.
I added from the board tab the 4 buttons then i added the 4 LEDs.
I'm using 2020.1, and by default it combined the AXI GPIO so there is a dual channel GPIO where both the leds and the buttons are connected.
My problem is, that in Vitis the generated IO example code uses the same port, and only the buttons work...

the device gets configured as such in the code:
#define GPIO_OUTPUT_DEVICE_ID    XPAR_GPIO_0_DEVICE_ID
#define GPIO_INPUT_DEVICE_ID    XPAR_GPIO_0_DEVICE_ID

In xparameters.h i found this:

/* Definitions for driver GPIO */
#define XPAR_XGPIO_NUM_INSTANCES 1

/* Definitions for peripheral AXI_GPIO_0 */
#define XPAR_AXI_GPIO_0_BASEADDR 0x40000000
#define XPAR_AXI_GPIO_0_HIGHADDR 0x4000FFFF
#define XPAR_AXI_GPIO_0_DEVICE_ID 0
#define XPAR_AXI_GPIO_0_INTERRUPT_PRESENT 0
#define XPAR_AXI_GPIO_0_IS_DUAL 1

/* Canonical definitions for peripheral AXI_GPIO_0 */
#define XPAR_GPIO_0_BASEADDR 0x40000000
#define XPAR_GPIO_0_HIGHADDR 0x4000FFFF
#define XPAR_GPIO_0_DEVICE_ID XPAR_AXI_GPIO_0_DEVICE_ID
#define XPAR_GPIO_0_INTERRUPT_PRESENT 0
#define XPAR_GPIO_0_IS_DUAL 1

The wizard creates two functions:
GpioOutputExample( GPIO_OUTPUT_DEVICE_ID, GPIO_BITWIDTH);
GpioInputExample(XPAR_AXI_GPIO_0_DEVICE_ID, &DataRead);

input example works (buttons), but output does not (leds)

Any help is appreciated!

Csaba

[tcmichals]

The GPIO API uses channels, #1 for push buttons and #2 for LEDS.  For example:

static XGpio gPIOBoardLEDAndPushbuttonss;

...

int rc = XGpio_Initialize(&gPIOBoardLEDAndPushbuttonss,0);

notice the API has 3 parameters, the GPIO handle, which channel 1 for Push buttons set data direction

XGpio_SetDataDirection(&gPIOBoardLEDAndPushbuttonss, 1, 1);

XGpio_SetDataDirection(&gPIOBoardLEDAndPushbuttonss, 2, 0);  set output for LEDs

XGpio_DiscreteWrite(&gPIOBoardLEDAndPushbuttonss, 2, 0x7);

 

[Edocecrous]

It might help someone, so i note that if the leds and buttons are connected to separate GPIO blocks, then Vitis generates the correct code for both.
Based on the help above i managed to make it work from one dual GPIO.

Edited August 31, 2020 by Edocecrous
typo

[JColvin]

Hello,

This is also detailed a little bit more in our Getting Started with Vivado IP Integrator and Vitis guide in this section here.

Thanks,
JColvin

[SeanLock]

Hi,

What is the difference between the canonical definitions and the other definitions listed below

/* Definitions for peripheral AXI_GPIO_0 */
#define XPAR_AXI_GPIO_0_BASEADDR 0x40000000
#define XPAR_AXI_GPIO_0_HIGHADDR 0x4000FFFF
#define XPAR_AXI_GPIO_0_DEVICE_ID 0
#define XPAR_AXI_GPIO_0_INTERRUPT_PRESENT 0
#define XPAR_AXI_GPIO_0_IS_DUAL 1

/* Canonical definitions for peripheral AXI_GPIO_0 */
#define XPAR_GPIO_0_BASEADDR 0x40000000
#define XPAR_GPIO_0_HIGHADDR 0x4000FFFF
#define XPAR_GPIO_0_DEVICE_ID XPAR_AXI_GPIO_0_DEVICE_ID
#define XPAR_GPIO_0_INTERRUPT_PRESENT 0
#define XPAR_GPIO_0_IS_DUAL 1

Thank you

[Richm]

The base address of an AXI lite IP comes from the Vivado address editor. If you examine the documentation for the GPIO, you will find the offsets and bit definitions for all the accessible registers. In this case, the offset for the second channel is 8 so Xil_in32( baseaddress ) will read the switches and Xil_Out32( baseaddress + 8, data ) will write the leds. The problem with Xilinx's driver code is that it can over complicate something simple

[SeanLock]

1 hour ago, Richm said:

The base address of an AXI lite IP comes from the Vivado address editor. If you examine the documentation for the GPIO, you will find the offsets and bit definitions for all the accessible registers. In this case, the offset for the second channel is 8 so Xil_in32( baseaddress ) will read the switches and Xil_Out32( baseaddress + 8, data ) will write the leds. The problem with Xilinx's driver code is that it can over complicate something simple

Thank you, @Richm. My question was not about the OP;I noticed that the generated "xaparameters.h"by VIVADO for a design including an AXI_GOPIO comprises two sets of identical values C macros: XPAR_AXI_GPIO_Id_XXX, and XPAR_GPIO_Id_XX.  I wonder why this duplication? I wonder which set should be used in different functions?

Thank you

[JColvin]

Hi @SeanLock,

My understanding is that the "canonical definitions" are automatically included by the Xilinx software into the xparameters.h so that any old weird backwards compatibility requirements are maintained. I personally can't recall an instance where this particular backwards compatibility came into play though.

No idea on why other lines that are completely identical are included though.

Thanks,
JColvin

[SeanLock]

Thank you @JColvin. I have just start learning about AXI and Mircoblaze coding; I was worried I might be missing an important point. I am struggling to find a comprehensive documentation on the subject; rather the user has to check many sources.

Regardless, as we can note in the OP,  the tool generates redundancy definitions as in the following:

#define XPAR_GPIO_0_DEVICE_ID XPAR_AXI_GPIO_0_DEVICE_ID
#define XPAR_AXI_GPIO_0_DEVICE_ID 0
#define GPIO_OUTPUT_DEVICE_ID    XPAR_GPIO_0_DEVICE_ID

GpioOutputExample( GPIO_OUTPUT_DEVICE_ID, GPIO_BITWIDTH);
GpioInputExample(XPAR_AXI_GPIO_0_DEVICE_ID, &DataRead);

 

A last point,  the XGPIO function: int XGpio_Initialize(XGpio *InstancePtr, u16 DeviceId); takes DeviceID as a parameter. The file xparameters.h includes the below macro definitions. Will the tool set the GPIO struct parameters (BASEADDR, HIGHADDER, INTERRUPT_PRESENT, IS_DUAL) to the corresponding defined  symbols automatically given the common "XPAR_AXI_GPIO_0" or "XPAR_GPIO_0" prefix?

 

/* Definitions for peripheral AXI_GPIO_0 */
#define XPAR_AXI_GPIO_0_BASEADDR 0x80000000
#define XPAR_AXI_GPIO_0_HIGHADDR 0x8000FFFF
#define XPAR_AXI_GPIO_0_DEVICE_ID 0
#define XPAR_AXI_GPIO_0_INTERRUPT_PRESENT 1
#define XPAR_AXI_GPIO_0_IS_DUAL 1

/******************************************************************/

/* Canonical definitions for peripheral AXI_GPIO_0 */
#define XPAR_GPIO_0_BASEADDR 0x80000000
#define XPAR_GPIO_0_HIGHADDR 0x8000FFFF
#define XPAR_GPIO_0_DEVICE_ID XPAR_AXI_GPIO_0_DEVICE_ID
#define XPAR_GPIO_0_INTERRUPT_PRESENT 1
#define XPAR_GPIO_0_IS_DUAL 1

 

Thank you