jpeyron

Hi @CaptFraz, Unfortunately we do not have a dimensional engineering drawings for the Cora Z7. best regards, Jon

Hi @mohammad poorkhalili, Welcome to the Digilent Forum! I sent you an PM about this. best regards, Jon

Hi @CaptFraz, We still do not have 3D CAD files available for the Cora Z7. I have passed on your request to our content team. best regards, Jon

Hi @shyams, When I looked further into the helloworld.c it appears that the interrupt functionality is not being used. I created a Arty-A7-35T Vivado 2018.2 gpio interrupt project here using the xgpio_intr_tapp_example.c provided by xilinx SDK code found here: C:\Xilinx\SDK\2018.2\data\embeddedsw\XilinxProcessorIPLib\drivers\gpio_v4_3\examples. Looking at the main function of the xgpio_intr_tapp_example.c the main function does not poll for data but rather uses the GpioIntrExample function. I have attached screen shots of the Vivado block designs. best regards, Jon

Hi @shyams, Welcome to the Digilent Forums! I have attached screen shots of the block design for the Vivado 2018.3 version of the Arty-A7-gpio interrupt project. I attached the SDK code as well. best regards, Jon helloworld.c

Hi @sabrina_n, I sent you a PM about this. cheers, Jon

Hi @huytergan, I would suggest looking at the Basys 3 GPIO demo The GPIO demo is done in VHDL and it uses the USB UART bridge. Here is the UART_TX_CTRL.vhd. best regards, Jon

Hi @gorrobey, I sent you a PM about this. best regards, Jon

Hi @thk3695, I sent you a PM about this. best regards, Jon

Hi @Mgilbert, I sent you a PM about this issue. best regards, Jon

Hi @hkhantang, I sent you a PM about this issue. best regards, Jon

Hi @Tim S., I reached out to a co-worker that got the same error as you. We dug further into my licenses and it turns out that I have the MIPI licenses and that is why i was not having issues. We also reached out to our content team which suggested to utilize the petalinux releases which include already generated bitstreams and hardware information so you would not need the licenses. As it stands now it sounds like if you are wanting to instead alter the linux base design or use the linux base design for a different linux platform then you would either need to strip out the licensed content or purchase the licenses. In the next few days I will be working on verifying that the petalinux release will not have the licensing issues that are in having in the zybo z7 20 base linux design. best regards, Jon

Hi @Tim S., The IP Cores provided by Digilent should not have a cost. Here is a forum thread that describes these MIPI altered IP Cores. Are you able to generated a bitstream with the Zybo Z7-20 PCAM-5C project here(use the Vivado 2017.4 version)? I believe this project uses the same altered MIPI IP Cores. best regards, Jon

Hi @Oblio, Welcome to the Digilent forums! Best regards, Jon