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zygot

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Topics posted by zygot

  1.  

    Question: SdSOC tools

    By zygot, in FPGA

    • Awaiting best answer
    • 0 votes
    • 7 answers
  2.  

    Question: Genesys2 Reference Manual

    By zygot, in FPGA

    • Awaiting best answer
    • 0 votes
    • 3 answers
  3.  

    Dear Digilent Santa

    By zygot, in Suggestions & Feedback

    • 1 reply
    • 1,090 views
  4.  

    More Fun with Phasors

    By zygot, in Project Vault

    • 0 replies
    • 1,090 views
  5.  

    Question: Using a Digilent FPGA Board for data conversion applications

    By zygot, in FPGA

    • Awaiting best answer
    • 0 votes
    • 5 answers
  6.  

    Git Repository Documentation

    By zygot, in Suggestions & Feedback

    • 1 reply
    • 977 views
  7.  

    Question: Digilent FMC implementations

    By zygot, in FPGA

    • Awaiting best answer
    • 0 votes
    • 4 answers
  8.  

    Boost your Memory

    By zygot, in Project Vault

      
    • 0 replies
    • 909 views
  9.  

    Question: NetFPGA-1G-CML

    By zygot, in FPGA

    • Awaiting best answer
    • 0 votes
    • 6 answers
  10.  

    Question: Digilent 128x32 OLED Display IP doesn't work properly

    By zygot, in FPGA

    • Awaiting best answer
      
    • 1 vote
    • 22 answers
  11.  

    Question: Time to ditch Windows for AMD/Xilinx FPGA Development?

    By zygot, in FPGA

    • Awaiting best answer
    • 0 votes
    • 2 answers
  12.  

    Is the RPi5 suitable for paring with an FPGA?

    By zygot, in Technical Based Off-Topic Discussions

      
    • 0 replies
    • 741 views
  13.  

    Question: NetFPGA-1G-CML QDRII+ interface

    By zygot, in FPGA

    • Awaiting best answer
    • 0 votes
    • 8 answers
  14.  

    Question: Trouble posting material

    By zygot, in Other

    • Awaiting best answer
    • 0 votes
    • 0 answers
  15.  

    Debugging with the FTxxxx Mini-Modules

    By zygot, in Tutorials

      
    • 0 replies
    • 585 views
  16.  

    Question: EclypseZ7 curiosity

    By zygot, in FPGA

    • Awaiting best answer
      
    • 0 votes
    • 1 answer
  17.  

    Why does Digilent like to irritate their customers?

    By zygot, in Suggestions & Feedback

    • 9 replies
    • 576 views
  18.  

    Question: Digilent master constraints format change request

    By zygot, in FPGA

    • Awaiting best answer
    • 0 votes
    • 0 answers
  19.  

    Question: Vivado issues work assignments ... again. New chores for 2020

    By zygot, in FPGA

    • Awaiting best answer
      
    • 0 votes
    • 1 answer
  20.  

    Question: Waveforms on the Eclypse-Z7

    By zygot, in Test and Measurement

    • Awaiting best answer
    • 0 votes
    • 1 answer
  21.  

    Question: NetFPGA_1G_CML QDRII+ IOSTANDARD isn't supported by VIvado MIG

    By zygot, in FPGA

    • Awaiting best answer
    • 0 votes
    • 0 answers
  22.  

    ADP2230

    By zygot, in Suggestions & Feedback

    • 0 replies
    • 70 views
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