EclypseZ7 curiosity

[zygot]

I've recently been experimenting on the Eclypse-Z7 and have run into a curious problem.

I created a board design with BRAMs having one port external for HDL access. I've run into a problem where the program hangs if I try to access the BRAM using a pointer rather than the driver. I thought that this was my coding error until I create a new application in the SDK using the predefined memory test. This compiled automatically and also hanged trying to access the bram. When I pressed btn0 on the board, the standard memory test application went on to complete testing both brams properly. btn0 is a reset to my HDL logic as well as the ps_processor _reset block in the board design. Hitting reset in my own application has the same result. I access the brams many times but only have to reset one, after the program start executing. Hitting reset before executing applications doesn't prevent the exception causing the processor to hang.

I haven't run into this before, but current SDK development isn't my area of expertise.,

[zygot]

I think that one issue is using multiple PS clocks in the design, and that fact that version 2019.1 of Vivado is horribly buggy. If you stick with pretty simple board designs things go smoothly, but doing anything remotely ambitious brings a lot of headaches. Even when the board design validates this doesn't mean that you can generate a design.