I've been struggling with an issue regarding the DDR streaming examples, more than likely of my own design, but I cannot figure out what exactly I did wrong.
For context, I am currently merging the s2mm and mm2s systems into one application in order to concurrently read signals in and write signals out. The goal is to output two different signals out of each channel from the zmod dac, physically split one of the channels with a T-adapter, then use the split signal to trigger an acquisition on the zmod scope. It's running on an Eclypse Z7 with the 1410 and 1411 in ports A and B respectively. All I've done so far is merge the mm2s single transfer system project into the s2mm cyclic transfer system project. The project builds successfully.
I'm encountering an error stating "Error set buf addr 128168 with 0 and FFFFFFFF, 128168." I was able to determine that xaxidma_bd.c was throwing the error, complaining that the buffer address was not correctly set. I'm not exactly sure how to interpret the difference between a 'correctly set' buffer address and an 'incorrectly set' buffer address, but I was able to reduce to something having to do with the buffer descriptor and its corresponding mask.
I read that an easy solution to this was to allow unaligned transfers in the DMA in hardware, but that seems pretty irresponsible and inelegant considering the complexity of the demo. I've been apprehensive to try it since my work machine is a bit less than modest... Synthesis and Implementations take a trip to the grocery store's worth of time. I'm also interested to see where exactly I went wrong in merging the two projects, such that I can learn from that mistake and not do it again given I do merge projects again in the future.
Attached are screenshots of the debugging session for reference.
Question
davwamai
Hello,
I've been struggling with an issue regarding the DDR streaming examples, more than likely of my own design, but I cannot figure out what exactly I did wrong.
For context, I am currently merging the s2mm and mm2s systems into one application in order to concurrently read signals in and write signals out. The goal is to output two different signals out of each channel from the zmod dac, physically split one of the channels with a T-adapter, then use the split signal to trigger an acquisition on the zmod scope. It's running on an Eclypse Z7 with the 1410 and 1411 in ports A and B respectively. All I've done so far is merge the mm2s single transfer system project into the s2mm cyclic transfer system project. The project builds successfully.
I'm encountering an error stating "Error set buf addr 128168 with 0 and FFFFFFFF, 128168." I was able to determine that xaxidma_bd.c was throwing the error, complaining that the buffer address was not correctly set. I'm not exactly sure how to interpret the difference between a 'correctly set' buffer address and an 'incorrectly set' buffer address, but I was able to reduce to something having to do with the buffer descriptor and its corresponding mask.
I read that an easy solution to this was to allow unaligned transfers in the DMA in hardware, but that seems pretty irresponsible and inelegant considering the complexity of the demo. I've been apprehensive to try it since my work machine is a bit less than modest... Synthesis and Implementations take a trip to the grocery store's worth of time. I'm also interested to see where exactly I went wrong in merging the two projects, such that I can learn from that mistake and not do it again given I do merge projects again in the future.
Attached are screenshots of the debugging session for reference.
Thanks.
edit: xaxidma.c -> xaxidma_bd.c
Edited by davwamaiLink to comment
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