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rappysaha

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Topics posted by rappysaha

  1.  

    Question: Genesys Zu-3EG HDMI Tx and Rx port Connection

    By rappysaha, in Add-on Boards

    • Has best answer
      
    • 0 votes
    • 5 answers
  2.  

    Question: Genesys Zu-3EG Upgradable DDR4 limit

    By rappysaha, in Add-on Boards

    • Has best answer
      
    • 0 votes
    • 3 answers
  3.  

    Question: Simple code for DDR3 SDRAM

    By rappysaha, in FPGA

    • Awaiting best answer
      
    • 0 votes
    • 12 answers
  4.  

    Question: External single ended clock by FMC connector in Genesys2

    By rappysaha, in FPGA

    • Awaiting best answer
      
    • 0 votes
    • 6 answers
  5.  

    Question: In formation about License of Genesys 2

    By rappysaha, in FPGA

    • Awaiting best answer
      
    • 0 votes
    • 4 answers
  6.  

    Question: How To Store SDK Project in Flash for genesys 2

    By rappysaha, in FPGA

    • Awaiting best answer
      
    • 0 votes
    • 14 answers
  7.  

    Question: Convert rgb2dvi IP from 8-bit input to the 12-bit input

    By rappysaha, in FPGA

    • Awaiting best answer
      
    • 0 votes
    • 1 answer
  8.  

    Question: Having trouble to generate a Project from digilent's Github

    By rappysaha, in FPGA

    • Awaiting best answer
      
    • 0 votes
    • 4 answers
  9.  

    Question: Having trouble with Block memory generator for Genesys 2

    By rappysaha, in FPGA

    • Awaiting best answer
      
    • 0 votes
    • 9 answers
  10.  

    Question: Invalid package pin of FMC connector at Genesys2 board

    By rappysaha, in FPGA

    • Awaiting best answer
      
    • 0 votes
    • 4 answers
  11.  

    Question: smartphone camera interfacing with Genesys and NEXYS 4 DDR

    By rappysaha, in FPGA

    • Awaiting best answer
      
    • 0 votes
    • 5 answers
  12.  

    Question: Nexys 4 DDR is not working

    By rappysaha, in FPGA

    • Has best answer
      
    • 0 votes
    • 1 answer
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