ADC-DAC Loopback Using ZMOD AWG-1411 and ZMOD ADC-1410

[Zufaruu]

Hello, I want to do an ADC-DAC Loopback Using Eclypse Z7 FPGA Board, ZMOD AWG-1411, and ZMOD ADC-1410, programmed using Xilinx SDK. I generate signal and send it from the DAC to the ADC. However, it turns out that the signal captured by the ADC is randomly shifted and sometimes it doesn't captured the signal (only captures noise signal). I want the ADC dan DAC starts simultaneously so that the ADC can captures the signal with short or fixed delay. Is there any idea how to do that?

I follow this DAC and ADC demo linux to create my code below.

I've tried to use std::async but it still doesn't work. I assume using ZMODADC1410::acquireTriggeredPolling should do it, but I still don't understand the trigger concept. Any explanation will be appreciated

Thank you very much

main.cc

Edited March 19 by Zufaruu

[Cristian.Fatu]

In order to answer the concern from your initial post, I will tell you some words about the trigger.

ZmodADC, regarded as a data acquisition device, can be configured (through ZMODADC1410 Class functions) to start the acquisition immediately or to start the acquisition only when a specific condition is met. This condition is called trigger condition, and may be defined by setting the trigger level, trigger mode, trigger edge and window position. You can read more details about these on https://digilent.com/reference/zmod/scope/zmodadc1410libraryuserguide.

The function ZMODADC1410::acquireTriggeredPolling starts by setting the trigger (call to ZMODADC1410::setTrigger), prepares the buffer length, starts the acquisition and then waits until a buffer of acquired data is available by polling the buffer full bit. In this moment acquired data is in the buffer, so the only thing left is to perform the DMA transfer of the acquired data.

Below is a explanation of the trigger parameters, taken from the above mentioned user guide.

[Zufaruu]

I've just done trial and error ZMODADC1410::acquireTriggeredPolling function and it's already worked

[Zufaruu]

On 3/20/2024 at 5:36 PM, Cristian.Fatu said:

In order to answer the concern from your initial post, I will tell you some words about the trigger.

ZmodADC, regarded as an data acquisition device, can be configured (through ZMODADC1410 Class functions) to start the acquisition immediately or to start the acquisition only when a specific condition is met. This condition is called trigger condition, and may be defined by setting the trigger level, trigger mode, trigger edge and window position. You can read more details about these on https://digilent.com/reference/zmod/scope/zmodadc1410libraryuserguide.

The function ZMODADC1410::acquireTriggeredPolling starts by setting the trigger (call to ZMODADC1410::setTrigger), prepares the buffer length, starts the acquisition and then waits until a buffer of acquired data is available by polling the buffer full bit. In this moment acquired data is in the buffer, so the only thing left is to perform the DMA transfer of the acquired data.

Below is a explanation of the trigger parameters, taken from the above mentioned user guide.

Thank you very much for the additional explanation 

Here, I want to set the trigger level in two conditions, say that the adc starts polling when the level is above 0.3 V and below -0.3 V. Is there any way to accomplish this?

 

Edited March 27 by Zufaruu