Trying to implement hdmi DEMO layout on genesys 2 board

[Cthbar]

Hi, I'm here because I'm trying to run the hdmi program (https://digilent.com/reference/programmable-logic/genesys-2/demos/hdmi) for the XC7K325T-2FFG900C board on vivado 2022.2, but there is no way it works, I have implemented the block design and carried out the bitstream. But when following the digilent steps, using the teraterm program, I get nothing, no program features of the created hdmi appear. I run the connections in tera with 115200 baud, but still nothing, in the block diagram it only asked me to update some IPs for the design. Could someone help me?

Please find attached the resulting IP block diagram, with the updates performed and the connections

Imagen of validate design:

and here is the image of the messages that tcl sends me:

Thank you.

system.pdf

Edited May 16, 2023 by Cthbar

[zygot]

There's a HDMI demo here: https://forum.digilent.com/topic/25315-using-ddr-as-a-video-frame-buffer/ for the Genesys2 that you might find interesting. It does require building a Windows host program though. It doesn't use the IPI flow which makes it less vulnerable to depreciated IP and Vivado version issues.

[zygot]

Great. Questions are nice. Feedback is better. Critical suggestions useful. Discussion informative for many... The weak link in the project seems to be the software application. Let's see some turkeys out there people!

[Cthbar]

Thank you very much for your answer zygot,I have managed to update the ips you have in the notes, I will tell you how it goes.

Edited May 23, 2023 by Cthbar
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