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attila

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Everything posted by attila

  1. Hi @ffggt See the following: https://digilent.com/reference/test-and-measurement/analog-discovery-pro-3x50/start
  2. Hi @infield This is a logic AND This is a latch. Go high when both inputs are high and to low when both are low, otherwise holds the output. or
  3. Hi @Mohamed Kamal See: If you are referring to the open/short compensation see WF SDK/ samples/ py/ AnalogImpedance_Compensation.py example and the following:
  4. Hi @Empower Move start_index = sample_index + 1; like in the included example: // This scripted is intended for use with Digilent Analog Discovery 3. // Refer to https://digilent.com/reference/test-and-measurement/guides/waveforms-script-editor // rgData: input, raw digital sample array // rgValue: output, decoded data array // rgFlag: output, decoded flag array var sample_count = rgData.length // sample_count = number of raw samples var previous_clock = false; // previous cock signal level var start_index = 0; // used to keep track on word start index var sbus_bit_count = 0; // byte count per transmission var bit_count = 0; // bit counter var bit_value = 0; // bit value var byte_value = 0; // byte value var sbus_bit = 0; // sbus bit var num_sbus_bits = 0; var sbus_byte_count = 0; for (var sample_index = 0; sample_index < sample_count; sample_index++) { // for each sample var current_sample = rgData[sample_index]; // current sample // var chip_select_pin = 1 & (current_sample >> 0); // pin0 is the select signal var clock_pin = 1 & (current_sample >> 1); // pin1 is the clock signal var data_pin = 1 & (current_sample >> 2); // pin2 is the data signal // if (chip_select_pin != 0) { // select active low // // while select inactive reset our counters/variables // start_index = sample_index+1; // select might become active with next sample // sbus_bit_count = 0; // bit_count = 0; // bit_value = 0; // previous_clock = false; // continue; // } if (previous_clock == 0 && clock_pin != 0) { // sample on clock rising edge bit_value <<= 1; // serial data bit, MSBit first if (data_pin) bit_value |= 1; bit_count++; if (bit_count == 2) { // when got the 2nd bit of the word store it sbus_bit_count++; if (bit_value == 0) { num_sbus_bits = 1; sbus_bit = 0; // "S" Start } else if (bit_value == 1) { num_sbus_bits = 8; sbus_bit = 1; } else if (bit_value == 2) { num_sbus_bits = 8; sbus_bit = 0; } else { num_sbus_bits = 1; sbus_bit = 1; // "P" Stop, End of Message } byte_value = (sbus_bit << (7 - (sbus_bit_count - 1))) | byte_value; if (sbus_bit_count == num_sbus_bits) { // when got the 2nd bit of the word store it sbus_byte_count++; // store rgValue/Flag from word start index to current sample position for (var j = start_index; j < sample_index; j++) { // rgFlag and rgValue used in Value2Text() // Flag change will be visible on plot even when data remains constant. // This is useful in case we get more consecutive equal bit_values. rgFlag[j] = sbus_bit_count; // If rgFlag[] is > 0, waveform is displayed rgValue[j] = byte_value; } start_index = sample_index + 1; // next word might start after this sample byte_value = 0; sbus_bit_count = 0; } bit_value = 0; // reset bit_value variable bit_count = 0; // reset bit count for the next byte } } previous_clock = clock_pin; // previous clock level }
  5. Hi @fizzbang The Analog Discovery 1,2,3 oscilloscope inputs are suitable for such measurements since these are differential. To measure the entire filter: channel 2 measured relative to 1. To measure just the second part influence: channel 2 measured relative to 1. In this case channel 1 absolute measurement will represent the first part only if the load does not cause W1 to drop.
  6. Hi @Hansi Make sure you are using a recent WaveForms version. (The AWG trigger for each period was added in v3.18.29)
  7. Hi @mms14 See the WF SDK/ samples/ py/ DigitalIn_Acquisition.py example
  8. Hi @grg Newer Xilinx tools should only detect cables. Try to connect to this manually, not with auto connect. Older tools may block access to other Digilent products. I noticed WaveForms listing JTAG yesterday, after building the last installer. This was added more than year ago for a prototype and it will be removed in the next version 3.21.22
  9. Hi @engrpetero You are probably driving DIO24-CS from Protocol (or StaticIO or Pattern Generator) The Protocol/SPI/Spy does not drive the specified SPI lines but the other Master,Custom... are intended for SPI master
  10. Hi @engrpetero Do you have proper ground connection between the devices ? Is the VIO set to to 3.3V ?
  11. Hi @Hansi See the following: double_pulse_and_acquisition_SDK_v2.py
  12. Hi @miketranch You can find the option next to the 'Clear buffers'
  13. Hi @mms14 On Linux usually only the OS architecture's applications are supported. The 64 bit OS and application (ARM64 for raspberry) will allow to capture more data but this system has its own limitations. The USB/system is slower and I'm not sure if you will be able to record at the desired rate.
  14. Hi @plswelcomeroh Use a resistor (like 1k for max 67mV) to reduce the V+ idle voltage.
  15. Hi @Hamza Oncuer Does it show you any information if you start the application from terminal ? $ waveforms or call dmesg after this
  16. Hi @miketranch You should not leave any together used device floating since the communication between these would not work, unless you use dedicated isolator. Voltage is potential difference ! You need to have a common or known relative level. You could use different reference voltage for the DUT, like the GND of this to be connected to +0.9V relative to the AD2 GND. A 0.9V floating supply negative to be at AD-GND and positive at DUT-GND or use the AD V+ supply. This way the AD's 0V will be -0.9V for the DUT and for AD's +0.9V be 0V for the DUT. Note, the AD-GND is connected to the computer GND via USB cable and this, depending on the computer supply, this may be connected to mains earth. A wrong connection, like earth referenced supply output connected to AD GND will be a short circuit that could damaged the devices ! Usually, the safest option is to use the same GND for all devices and generate negative pulses.
  17. Hi @miketranch This is a high resolution trigger counter&timer measurement performed in the device.
  18. Hi @mms14 What operating system are you using ? The 64bit WaveForms support Logic Analyzer captures of up to 256Mi samples and for 32bit it is limited to 10M.
  19. Hi @infield Configure the Logic Analyzer trigger detector and trigger the Pattern Generator on Logic Detector.
  20. Hi @Norm-12 The Spectrum analysis options can be enabled in Network Analyzer under Magnitude group.
  21. Hi @infield Unfortunately only the DIOs can be controlled from Patterns and used by ROM logic.
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