I2C interfacing with Zybo Z7020 (making PL as Slave)

[Niranjana]

Hi, 

I am trying to make PL as slave in a I2C protocol while am using other board as master..

The below IP is what I have created.. Am I correct? I need to make axi_iic_0 as slave. 

 

[artvvb]

Hi @Niranjana

Please check your uploaded image, looks like it didn't come through correctly.

Digilent doesn't provide any examples of an I2C slave at this time, but it should be possible to configure an AMD/Xilinx AXI I2C IP, or the Zynq PS itself via EMIO, to act as a slave. There's some info here which may be helpful: https://support.xilinx.com/s/question/0D52E00006hpi0rSAA/zynq-i2c-slave-readback?language=en_US, https://docs.xilinx.com/r/en-US/ug585-zynq-7000-SoC-TRM/I2C-Controller.

Thanks,

Arthur

[Niranjana]

Thank you for the reply.. Since the previous attempt didn't work out properly ..I'm trying to make PS as master and PL as slave..Are there any proper documentations for the same? And should we write individual codes for the same in vitis?