I've been attempting to make a program that produces a 16383 sample long linear chirp on an Eclypse Z7 (DAC1411). Stuff is going well, I'm using Vivado 2019.1 to match with the IP create_hier script, but I can't seem to produce a signal over 4096 samples long. Attached is my main code and a photo of a scope showing the first quarter of the chirp.
Any help, or further questions would be greatly appreciated. I'm very new to FPGA programming.
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timmy
I've been attempting to make a program that produces a 16383 sample long linear chirp on an Eclypse Z7 (DAC1411). Stuff is going well, I'm using Vivado 2019.1 to match with the IP create_hier script, but I can't seem to produce a signal over 4096 samples long. Attached is my main code and a photo of a scope showing the first quarter of the chirp.
Any help, or further questions would be greatly appreciated. I'm very new to FPGA programming.
main.cc
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