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attila

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Everything posted by attila

  1. Hi @leonvs Thank you for the observation. I noticed it, but I haven't figured out why does this yet. Please use the Editor where you also have a preview of the filter characteristics.
  2. Hi @isaacz The available configurations are the ones listed by the application.
  3. Hi @alpanth Probably the sample rate (FDwfAnalogInFrequency) is at maximum, = system frequency (100MHz), and due to this decimate sampling is used instead of decimate. With external sampling clock (FDwfAnalogInSamplingSource) averaging is similarly changed to decimate.
  4. Hi @Take4 It is, it should work. I've added the following to your code: dwf.FDwfAnalogOutNodeOffsetSet(hdwf, c_int(0), AnalogOutNodeCarrier, c_double(0.5)) Getting this with AC: dwf.FDwfAnalogInChannelCouplingSet(hdwf, c_int(-1), c_int(1)) and this with DC: dwf.FDwfAnalogInChannelCouplingSet(hdwf, c_int(-1), c_int(0))
  5. Hi @isaacz Use the 3rd device configuration with more Wavegen buffer or for even more samples at lower rate use the Wavegen/Play option.
  6. Hi @Tonguç Endem Probably the USB controller got damaged by high USB voltage. See the following:
  7. Hi @YuQiang See for instance the AnalogOut_Sweep.py example. Configure AnalogIn... dwf.FDwfAnalogInFrequencySet(hdwf, c_double(hzRate)) dwf.FDwfAnalogInBufferSizeSet(hdwf, c_int(cSamples)) dwf.FDwfAnalogInTriggerSourceSet(hdwf, trigsrcAnalogOut1) dwf.FDwfAnalogInTriggerPositionSet(hdwf, c_double(230e-6 + 0.5*cSamples/hzRate)) # capture starts 230us after trigger, after AWG start dwf.FDwfAnalogInConfigure(hdwf, c_int(1), c_int(1)) (alternatively you could use FDwfAnalogInTriggerConditionSet DwfTriggerSlopeFall AWG stop and Position of 210us) Configure AnalogOut... dwf.FDwfAnalogOutConfigure(hdwf, channel, c_int(1)) Wait for AnalogIn DwfStateDone
  8. Hi @jmf You are in the right place, I'm the WaveForms developer. 1. The Analog Discovery 3 provides a set of features and lets you control the device with ~ms latency, depending on number of transfers, capture time, processing... around 100-500Hz rate. The AWG hardware/FPGA provides FM or PhaseM and AM or Summing, it also lets you specify trigger-wait-run-repeat for burst signals, at system frequency precision 8-20ns, which is adjustable between 50-125MHz. The FIR channels on the Scope inputs have only 16 taps and the newer sw version lets you adjust cutoff frequencies. Demodulation is not yet available. I don't know if these features are sufficient for you. 2. The ADP3X50 and EcypseZ7 provides embedded Linux, with lower software latency, depending on processing, order of ~100us. 3. The EclypseZ7 also lets you customize or create custom FPGA logic, this would mean 'real-time', ns level or latency or hardware accelerated software control.
  9. Hi @niko11 Are you sure you are using Digital Discovery ? This has one configuration.
  10. Hi @jmf You can explore the software and device features with WaveForms application in Demo mode. I don't think all the features you are looking for are available, like frequency and phase modulation can be used exclusively. The highest flexibility would give the EclypseZ7 with Zmods. With this you can work in embedded Linux, standalone app or customize the FPGA configuration. https://digilent.com/reference/programmable-logic/eclypse-z7/start
  11. Hi @egonotto Specify finite Run time (or use Auto) with Synchronized or Independent modes. With continuous Run a trigger signal is generated on each signal (carrier) period start.
  12. Hi @outback You can enter 'escape' codes or select Number mode for TX and RX.
  13. Hi @XCR With AD2, as you can see in the preview, the actually generated frequencies are not exact. The AD3, ADP3X50... can generate more precise frequencies. Use the Synchronized mode for phased signals to be started at the same time, otherwise the channels can operate independently. Finite Run time, restarting the channels periodically, Auto will set the longest periods or specify the least common multiple of periods.
  14. Hi @zygot decimate = every Nth ADC conversion average = SUM of N conversions / N
  15. Hi @oi18ct The digital/protocol interpretation of oscilloscope data, porting of analog/scope samples to digital/logic analyzer, will be available in the next sw version, in few days.
  16. Hi @norandomtechie The AD3 is mostly backwards compatible with AD2. Most of the examples should work on all devices. Difference is in the available buffer sizes, device configurations, system monitoring. See the SDK manual pdf in the installation, next to the examples. The devidDiscovery3 was added to dwf.h in newer versions, see:
  17. Hi @Jim Luby With Decimate the Nth (sys-ADC freq / Rate) samples are stored, these is no low pass filter involved. The Average of N samples eliminates or highly reduces the aliasing but causes a bit of damping. With AD3, ADP3X50... in device Filters channels are available.
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