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DavideDevoti

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  1. Hi Viktor, thanks for the reply. By the way I think that with XADC Wizard IP you can only read analog input values in your PS application while I would like to process them directly in the PL.
  2. Hi, in my Vivado project for Cora Z7-07S I added a custom IP connected with AXI-Lite I/F to PS and so far I've been able to connect digital I/O to the IP after having defined the ports in vhdl code of the IP as in/out std_logic and then connecting them to ports created at the main level following the names reported in the costraint file. In the picture above there is a screenshot of a part of my design. davide_hdlc_0 is my custom IP block, ck_io10 amd ck_io11 are Cora Z7 IOs and I've connected them to two IP inputs. My question is now : how I can do the same for analog inputs, for example if I want to read single ended analog data from A0 ? I think I will have to uncomment the following lines in the xdc file set_property -dict { PACKAGE_PIN E17 IOSTANDARD LVCMOS33 } [get_ports { vaux1_p }]; #IO_L3P_T0_DQS_AD1P_35 Sch=ck_an_p[0] set_property -dict { PACKAGE_PIN D18 IOSTANDARD LVCMOS33 } [get_ports { vaux1_n }]; #IO_L3N_T0_DQS_AD1N_35 Sch=ck_an_n[0] but after having done this how I can connect this input to my custom IP ? That is what kind of input port I have to create in my custom IP and how I can connect this port to the physical analog input source ? Thanks Davide
  3. Hi John, the files you have attached made my application to work. Thanks Davide
  4. Hi Arthur, thanks for the reply. I'll try your suggestion but I think the problem is not related to freertos. For the test I'm connecting the board to a laptop using an ethernet cable. The cable is good as I used it in the past to connect the laptop to an ethernet switch and more recently to run an ethernet only test on the board connected to same pc (that worked fine). For that test anyway I used Vitis 2023.2 while now I'm using 2023.1 as for your suggestion for my boot image related issues. While running the udp test I mentioned above I see that the pc connected to the board detects the cable as disconnected when I run the application on the cora z7 while it detects the cable as connected when the application is not running, so it seems that there is some low level operation executed by the application that puts the link into an incorrect state. That's why I asked if I had to take more files from that github archive other that the one indicated in the example. I'll keep you updated about the test with the Echo Server example. Thanks Davide
  5. Hi, can I have a feedback on this topic ? Thanks Davide
  6. Hi, I tried to run on Cora Z7-07S the freertos client udp example that is included in Vitis 2023.1. The application starts but it seems to fail in the PHY autonegotiation. According to what is recommended in the following page https://digilent.com/reference/programmable-logic/guides/zynq-servers I replaced the file xemacpsif_physpeed.c. in the original lwip folder with the one taken from the repository indicated. But I'm still having the problem I have reported. Checking the other files in the lwip folder present in the github archive I found many differences respect to the original files so I wonder if I have to replace all the files and not just the one indicated in that page. What do you recommend ? Thanks Davide
  7. Hi, I've tried to rebuild all my application using 2023.1 tools and boot image works fine. Thanks Davide
  8. Thank you, I've just installed version 2023.1 and I'm going to start to develop my application again on that version. I checked the links you have indicated but they cover only the basics up to application load through jtag (that I was already able to do) but there is no mention about boot image generation. Please keep me updated in case you have any news about 2023.2. Thank you very much Davide
  9. Hi Arthur, the boot.bin file you have shared works fine (that is I can boot it from sdcard). Anyway I have a concern about the sources you have included. I tried to open the Vivado sources that you have put in cora_sd.xpr.zip with my version of Vivado (2023.2) and it says that it has to convert them from older version etc. and it makes sense as you wrote that they were generated with version 2023.1. But I'm not able at all to open the vitis sources, the tool I'm using from the about dialog box is identified as "Vitis Unified IDE v2023.2.0", is it the correct tool to use or I need another one ? Thanks Davide
  10. Hi Arthur, thanks for you reply. Actually I tried with two different sd cards (first one 64 GBytes, second one 16 GBytes) with only one FAT32 partition and in both cases the application didn't start. So probably I have a different issue. The board I'm using is a Cora Z7-07S. At the moment I don't know if the boot.bin file I put on the sd card is not correct or if I'm doing some error in configuring the board for the proper boot source, can I have a simple boot.bin file for that board that works fine (for example a simple application that turns a led on and off) in order to check if I'm configuring correctly the board ? Thanks Davide
  11. Hi guys, like I wrote on another topic I'm having trouble booting my application from sd card on a Cora Z7-07S. Apparently I'm doing all as indicated in the manual but then when I put the jumper on JP2 and I power cycle the board nothing happens (also FPGA programming DONE LED is off even if my boot image should contain a fpga bitstream). I'm supplying the board using usb and my application when loaded from jtag works fine. Any idea about what could be wrong ? Any help will be appreciated. Thanks Davide
  12. Hi, I'm making some development on Cora Z7 board and I'll need some help on the boot from SD card. So far I've been able to develop some applications using Vivado and Vitis but always loading my applicatons from JTAG. I tried to make the applications boot from SD card but so far it seems I'm not having success at that. What I do is the following: 1. I generate boot.bin file from Vitis system component that includes the app component I would like to make the board execute (loading the app component from jtag works fine) 2. I put the file on a 64 GBytes micro sd card formatted as FAT32 and insert it in the board sd card slot 3. I close the mode jumper (item 8 in the documentation at https://digilent.com/reference/programmable-logic/cora-z7/reference-manual?redirect=1) 4. I power on the board from usb connected to my laptop After step 4 I'm expecting the board to start executing my application but no application seem to run. There is something wrong or incomplete in what I do ? Thanks in advance Davide
  13. Hi everyone, my name is Davide, living and working in Italy. In the past I worked mainly as embedded software engineer but in the last months I started to play a bit with FPGAs. Right now I'm doing some tests with Cora Z7 development board
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