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Just want to remark this anomaly between the pinout list from AMD (Xilinx) and the Eclipse-Z7 XDC and schematic files. These are the pinout of the PMOD headers as is given in the XDC file for the board #- Pmod Header JA in IO-Bank 35 #- #- set_property -dict { PACKAGE_PIN B15 } [get_ports { ja[0] }]; #- IO_0_35 Sch=ja1_fpga #- set_property -dict { PACKAGE_PIN C15 } [get_ports { ja[1] }]; #- IO_25_35 Sch=ja2_fpga #- set_property -dict { PACKAGE_PIN D15 } [get_ports { ja[2] }]; #- IO_L1N_T0_AD0N_35 Sch=ja3_fpga #- set_property -dict { PACKAGE_PIN E16 } [get_ports { ja[3] }]; #- IO_L1P_T0_AD0P_35 Sch=ja4_fpga #- set_property -dict { PACKAGE_PIN E15 } [get_ports { ja[4] }]; #- IO_L2N_T0_AD8N_35 Sch=ja7_fpga #- set_property -dict { PACKAGE_PIN F17 } [get_ports { ja[5] }]; #- IO_L2P_T0_AD8P_35 Sch=ja8_fpga #- set_property -dict { PACKAGE_PIN F16 } [get_ports { ja[6] }]; #- IO_L3N_T0_DQS_AD1N_35 Sch=ja9_fpga #- set_property -dict { PACKAGE_PIN G16 } [get_ports { ja[7] }]; #- IO_L3P_T0_DQS_AD1P_35 Sch=ja10_fpga #- Pmod Header JB in IO-Bank 35 #- #- set_property -dict { PACKAGE_PIN G15 } [get_ports { jb[0] }]; #- IO_L4N_T0_35 Sch=jb1_fpga #- set_property -dict { PACKAGE_PIN D16 } [get_ports { jb[1] }]; #- IO_L4P_T0_35 Sch=jb2_fpga #- set_property -dict { PACKAGE_PIN D17 } [get_ports { jb[2] }]; #- IO_L5N_T0_AD9N_35 Sch=jb3_fpga #- set_property -dict { PACKAGE_PIN E18 } [get_ports { jb[3] }]; #- IO_L5P_T0_AD9P_35 Sch=jb4_fpga #- set_property -dict { PACKAGE_PIN F18 } [get_ports { jb[4] }]; #- IO_L6N_T0_VREF_35 Sch=jb7_fpga #- set_property -dict { PACKAGE_PIN G17 } [get_ports { jb[5] }]; #- IO_L6P_T0_35 Sch=jb8_fpga #- set_property -dict { PACKAGE_PIN H18 } [get_ports { jb[6] }]; #- IO_L7N_T1_AD2N_35 Sch=jb9_fpga #- set_property -dict { PACKAGE_PIN H17 } [get_ports { jb[7] }]; #- IO_L7P_T1_AD2P_35 Sch=jb10_fpga The above text from the constraints file is also how things are pictured in the schematics of the Eclypse-Z7 board. BUT: The pin numbers might be correct the description of the pin function is wrong for some pins! It is wrong in the XDC file and also in the schematics (page 8 of 15) This is the pin numbering and pin function description as is is provided in the Xilinx pinlist obtained from the “Zynq 7000 SoC Packaging and Pinout Specification” (UG865) page 27 entitled “ASCII Pinout Files”. Link CLG484 in table 2-1 This is the pinning of PMOD JA F16 IO_L1P_T0_AD0P_35 IO-Bank 35 E16 IO_L1N_T0_AD0N_35 IO-Bank 35 E15 IO_L3P_T0_DQS_AD1P_35 IO-Bank 35 D15 IO_L3N_T0_DQS_AD1N_35 IO-Bank 35 G16 IO_L4N_T0_35 IO-Bank 35 F17 IO_L6N_T0_VREF_35 IO-Bank 35 C15 IO_L7P_T1_AD2P_35 IO-Bank 35 B15 IO_L7N_T1_AD2N_35 IO-Bank 35 This is the pinning of PMOD JB H17 IO_0_35 IO-Bank 35 D16 IO_L2P_T0_AD8P_35 IO-Bank 35 D17 IO_L2N_T0_AD8N_35 IO-Bank 35 G15 IO_L4P_T0_35 IO-Bank 35 F18 IO_L5P_T0_AD9P_35 IO-Bank 35 E18 IO_L5N_T0_AD9N_35 IO-Bank 35 G17 IO_L6P_T0_35 IO-Bank 35 H18 IO_25_35 IO-Bank 35 The pin information, being pin number to its function, is for boyj PMOD connector completely mingled. One example of what’s wrong: The Eclypse-Z7 XDC file list pin B15 of PMOD JA as having the function IO_0_35 While the Xilinx pin information lists that function to pin H17 fixed in PMOD JB Please review the XDC and schematics (schematic symbol of the FPGA). Thanks

Hi @Fausto, Neither side and nowhere on the cardboard box of the Eclypse board is a R/N label The same applies for the: ZmodSCOPE and ZmodAWG boards I ordered packaged with the Eclipse board. The cardboard boxes have all a barcode with DPN number (That is a label with a dash). When I enter that (without dash) in the registration system, I get the same response (wrong number). I also have a "ANALOG discovery 2" pod and that has the same issue. Only a single barcode at the bottom and when entered in the registration system the known response "wrong number". See attached photos Regards

Dear Fausto, Thanks for the reply. Before I asked my question, I did the things you describe but when registering the tool comes back with "registration number is invalid". I now followed exactly your description but again "registration number is invalid" is the answer of the tool. You write "The product's registration number (R/N) can be found on a white barcode attached to the back of the product and on the product's package box." On the back of the Eclypse board the number under the barcode reads: "DB5E7C6" but apparently that's not the correct number. The number contains NO dashes. You also mention a text "R/N" but that can not be found on the board nor on the box. A photo of the backside of the eclypse board is attached. What goes wrong or what do I do wrong? Regards,

Hi, I recently bought a Eclypse Z7 with ZmodAWG and ZmodScope. If I want to register the product, I always get that the given number is wrong. Where can I find the registration number of these products? I have the same question for an earlier purchased Analog Discovery 2 pod. Many thanks in advance,

Thanks !

Dear, I want to port PetaLinux onto the USB104 board but need a BSP file for the board. Is there a BSP file available for the USB104 board? or does somebody have a USB104 BSP file for share? Many thanks in advance

Thanks!

Hi, I'm going to use the Analog Discovery 2 on a project and watched already some of the quickstart videos. The thing I'm missing somewhere is: Is it possible to use eight digital lines as pattern generator and at the same time on the left over eight signals the logic analyser? Or can the instrument only operate one function at a time? (being analyser or generator, but not both at the same time). Thanks,