Odd FPGA behavior (possibly damaged)

[buckd]

Hi,

We've been using the Arty quite heavily for various projects, and only recently have I come across some strangeness which may indicate damage.  We are using a Microblaze design with several GPIO blocks to control lots of digital I/O.  Just today I have noticed:

• BTN 3 no longer works
• SW0 operates as a button (and still a switch)
• Touching the top side of the Artix-7 chip with my finger (little or no pressure) will also be detected as a button

This seems like internal FPGA damage and I'm wondering what can be done about it.  In Vivado or elsewhere, is there a way to detect the bad innards and perhaps route around them?

It is very likely that we shorted something as we are using it to drive a large number of custom digital peripherals.

Thanks!

D

[JColvin]

Hi buckd,

That is strange phenomenon. Since you've been using it pretty extensively I'm going to guess it's not an xdc file problem. I'll ask some of our applications engineers to see what they think.

I don't quite understand the touching the top of the FPGA acting as a button though. Do you mean that you can touch the FPGA and have an LED turn on or am I misinterpreting what you saying?

Thanks,
JColvin

[buckd]

Yep, I take my finger and make slight contact with the top of the chip and a button press is registered.  We haven't made block diagram or XDC modifications to our bitstream in quite a while, and just use C code run in the SDK. 

This was discovered by accident when I felt the chip to see if it was overheating after getting the weird behavior.  I can tell it registers as a button press because I have code that is more or less like this:

while(1)
{
    while(!buttons_read());  // Wait press
    // Do stuff
    while(buttons_read());  // Wait unpress
}

where 'buttons_read()' is a function that uses the PmodGPIO block to detect a button press.  The center code is always run when touching that part of the chip.

It's odd because the main application otherwise runs normally, including heavy computations on the microblaze.

[D@n]

I can offer a hypothesis or two that might make sense: the FPGA has become party desoldered, or the solder underneath the FPGA is no longer making a complete contact.  Perhaps the board has warped, perhaps it got too hot at some point, either way, the solder ball no longer touches and the pin isn't working.  When you touch the FPGA, and push it just enough, that solder ball makes electrical contact and all of a sudden that pin works.

This could also explain the behaviour of the switch.

As for how to fix it, you might need to reflow the solder ... but that's outside of my realm of expertise.

Dan

[JColvin]

Hi buckd,

I talked with some of our applications engineers and they agree with Dan that there is potential for the FPGA to have become partially unsoldered. I would recommend contacting Digilent Support at support @ digilentinc.com for warranty and repair.

Thanks,
JColvin

[buckd]

Hi, and thanks for the response. 

Note that the touching of the FPGA requires no pressure at all - mere contact with the skin seems to do it.

Are there tools that exist that can detect possible FPGA damage, mark it, and work around it?

Thanks!

D

[D@n]

Well ... yes.  That was the whole purpose of the design of the JTAG port--to test whether or not pins are properly connected between devices.  It was to be used as a "Boundary Scan" port, or controller.  The basic idea is that, via JTAG, you can give the FPGA commands for all of its pins: set this pin high, this pin low, this pin to high impedence, and tell me what the values are on each of the following pins ...etc.  By going this approach, you can tell whether or not the FPGA is connected to the peripherals like you think it is.

That's the text book answer.

From my experience, I haven't seen or found the support tools necessary to do this, neither have I read about this being done routinely.

If someone reading has a different experience, such as if someone (Digilent?) uses this port for that purpose, please speak up here.  Even better, if you have a JTAG program or script that proves how well your FPGA works (or if it is broken) that you can share ... even better.

Dan

[jpeyron]

Hi Buckd and D@n,

D@n's answer is correct about the JTAG. Unfortunately, we do not have a script or JTAG program that detects possible FPGA damage, marks it, and works around it. 

cheers,

Jon