wooyoungpark Posted November 26, 2023 Share Posted November 26, 2023 Hello, I'm trying the nexys video HDMI example. Is it correct to store the information of the image in ddr? If right, which one of the verilog codes or vitis controls the ddr? Where do I store the image information if it's not stored in ddr? Thank you. Link to comment Share on other sites More sharing options...
zygot Posted November 27, 2023 Share Posted November 27, 2023 What example project are you referring to? Link to comment Share on other sites More sharing options...
wooyoungpark Posted November 28, 2023 Author Share Posted November 28, 2023 https://digilent.com/reference/programmable-logic/nexys-video/demos/hdmi This is the 2022 version of this link. Link to comment Share on other sites More sharing options...
zygot Posted November 28, 2023 Share Posted November 28, 2023 You're at the mercy of Digilent Staff for support for their demo projects. Here's where you can find an alternate HDMI project for the Nexys Video: https://forum.digilent.com/topic/25315-using-ddr-as-a-video-frame-buffer/ If you want help with the one that you started with, I suggest creating a new post in the FPGA section of the Forums and specifically reference the project source. Sometimes, someone on staff at Digilent can provide answers to your questions, occasionally a user can provide assistance. I don't use Digilent demo projects. Link to comment Share on other sites More sharing options...
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