ManiS Posted November 21, 2023 Share Posted November 21, 2023 (edited) Hi We are using Eclypse Z7 board and I have a petalinux built with the FPGA's XSA with added I2c LogiCORE IP AXI IIC axi_iic_ds756.pdf, https://docs.xilinx.com/v/u/1.02a-English/axi_iic_ds756 How add drivers for I2c LogiCORE IP AXI IIC Bus? is that xilinx iic drivers in kernel config is the correct support for this ip ? How to test these i2c interface provided by this FPGA IP? Edited November 22, 2023 by Mania Link to comment Share on other sites More sharing options...
0 Ionel Posted November 22, 2023 Share Posted November 22, 2023 @Mania https://xilinx-wiki.atlassian.net/wiki/spaces/A/pages/18841974/Linux+I2C+Driver Link to comment Share on other sites More sharing options...
0 ManiS Posted November 22, 2023 Author Share Posted November 22, 2023 (edited) Thanks a lot, One more question pls, our xsa has i2c bus added to AXI bus to the FPGA, when we do i2cdetect-l its only showing 12c-0, this is processor i2c side bus being displayed, We are not getting the AXI i2c bus displayed even after adding CONFIG_I2C_XILINX=y . did this as its shown below. Anything we missed to add to add i2c bus from AXI interface to come up in petalinux ? While booting qemu we get this error for axi i2c bus i2c_dev: i2c /dev entries driver xiic-i2c 40020000.i2c: Failed to clear rx fifo xiic-i2c 40020000.i2c: Cannot xiic_reinit xiic-i2c: probe of 40020000.i2c failed with error -110 Following settings were done PS side i2c bus is "Cadence I2C at e0005000", not poping up the AXI i2c bus with i2cdetect command Edited November 27, 2023 by Mania Link to comment Share on other sites More sharing options...
0 Ionel Posted November 28, 2023 Share Posted November 28, 2023 @Mania How is your device tree node for axi iic. Excerpt from above documentation. IIC: i2c@81600000 { compatible = "xlnx,xps-iic-2.00.a"; interrupt-parent = <&xps_intc_0>; interrupts = < 6 2 >; #address-cells = <1>; #size-cells = <0>; m24c08@50 { compatible = "at,24c08"; reg = <0x50>; }; } ; In this case this device tree node makes sure to load xilinx iic driver because of line: compatible = "xlnx,xps-iic-2.00.a"; Also m24C80@50 is a device attached to axi iic bus having address 50(hex) for which driver at,24c08 is loaded and configured You can find what has been generated for your hardware design in <petalinux project directory>/components/plnx_workspace/device-tree/device-tree/pl.dtsi To expand/change axi iic node definition edit below mentioned file. Note: Node handler is &label where label is in pl.dtsi. eg. label: i2c@ADDRES in above example: IIC <petalinux project directory>/project-spec/meta-user/recipes-bsp/device-tree/files/system-user.dtsi Also at runtime you can check your device tree with: dtc -I fs /sys/firmware/devicetree/base/ Link to comment Share on other sites More sharing options...
0 ManiS Posted November 28, 2023 Author Share Posted November 28, 2023 (edited) Thanks Lonel, Following are the contents of our hw design captured in the files "pl.dtsi" and "system-conf.dtsi" , Seems matching with the link description, But not sure what is missing for not detecting axi_i2c bus on qemu, Anything wrong with these 2 file contents ? somthing like m24C80@50 is missing for axi i2c, no device added yet could be the reason for issue ? Is XSA file is a issue here ? In pl.dtsi <petalinux project directory>/components/plnx_workspace/device-tree/device-tree/pl.dtsi axi_iic_0: i2c@40020000 { #address-cells = <1>; #size-cells = <0>; clock-names = "s_axi_aclk"; clocks = <&clkc 15>; compatible = "xlnx,axi-iic-2.1", "xlnx,xps-iic-2.00.a"; interrupt-names = "iic2intc_irpt"; interrupt-parent = <&intc>; interrupts = <0 30 4>; reg = <0x40020000 0x10000>; }; In <petalinux project directory>/project-spec/meta-user/recipes-bsp/device-tree/files/system-user.dtsi /include/ "system-conf.dtsi" / { }; &axi_iic_0{ clock-frequency = <400000>; status = "okay"; }; Is clock frequency ok? changed it to 100000, then too same issue. When we do dtc -I fs /sys/firmware/devicetree/base/ amba_pl { compatible = "simple-bus"; ranges; #address-cells = <0x01>; #size-cells = <0x01>; phandle = <0x36>; i2c@40020000 { compatible = "xlnx,axi-iic-2.1\0xlnx,xps-iic-2.00.a"; clocks = <0x01 0x0f>; clock-names = "s_axi_aclk"; status = "okay"; interrupt-parent = <0x04>; #address-cells = <0x01>; interrupts = <0x00 0x1e 0x04>; #size-cells = <0x00>; phandle = <0x38>; reg = <0x40020000 0x10000>; clock-frequency = <0x61a80>; interrupt-names = "iic2intc_irpt"; }; followed online link also related to it, also not helping MicroZed Chronicles: PetaLinux I2C in the PS and AXI IIC (adiuvoengineering.com) Edited November 30, 2023 by Mania Link to comment Share on other sites More sharing options...
0 ManiS Posted December 4, 2023 Author Share Posted December 4, 2023 Any suggestions on this issue? anything to do with sda clk for axi_iic_0? Link to comment Share on other sites More sharing options...
0 Ionel Posted December 6, 2023 Share Posted December 6, 2023 not detecting axi_i2c bus on qemu There is no way to detect axi_i2c while in qemu since qemu is vm not real hardware. and the PL(FPGA) part is not present while using qemu. Only while running on board can you have access to axi_i2c (in PL) after bitsream is loaded by fsbl or u-boot. Link to comment Share on other sites More sharing options...
0 ManiS Posted December 7, 2023 Author Share Posted December 7, 2023 Thanks Lonel Ionel 1 Link to comment Share on other sites More sharing options...
0 user32 Posted May 29 Share Posted May 29 I realize this post is far from new, but Ive been stuck trying to get xilinx's i2c driver running in petalinux for a while now with no luck... did you get it working? thanks Link to comment Share on other sites More sharing options...
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ManiS
Hi
We are using Eclypse Z7 board and I have a petalinux built with the FPGA's XSA with added I2c LogiCORE IP AXI IIC
axi_iic_ds756.pdf, https://docs.xilinx.com/v/u/1.02a-English/axi_iic_ds756
How add drivers for I2c LogiCORE IP AXI IIC Bus? is that xilinx iic drivers in kernel config is the correct support for this ip ?
How to test these i2c interface provided by this FPGA IP?
Edited by ManiaLink to comment
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