Editing ADC/DAC Zmod Examples in Vitis IDE

[aleib_borgwarner]

I am working on a SW project for BorgWarner using the Eclypse Z7 board along with the Zmod Scope/ADC and AWG/DAC. 

I got the demo projects working on the device and have made some edits using the Vitis IDE and the provided wrapper that came with the demo projects. However, I'm having trouble getting the ADC and DAC to "talk" with each other...

## The goal:

Have an input signal to the ADC -> send signal to DAC in near-real-time. And maybe do some signal modulation in between.

I would like to accomplish this within Vitis using the C/C++ wrapper provided with the demos, but if that is not possible, am open to other methods for accomplishing this goal 

[artvvb]

Hi @aleib_borgwarner

Welcome to the forums.

I assume you need to continuously forward data without "gaps". The software examples do not include a hardware data path between Scope input and AWG output and run on a triggered acquisition model. To get close, without hardware modification, you would effectively need to perform manual triggers (acquire immediate, if you're using the zmodlib demos), and forward each acquisition to the AWG to be played once, which would have substantial gaps in the data due to the software timing. Delay from the input to the output could also be substantial. Modification of the software demos' hardware projects to add a loopback data path is possible, but potentially complicated.

The low-level filter demo is similar to what you are looking for, forwarding continuously captured and processed data from the scope input to the AWG output. However, it is entirely implemented in hardware.

Thanks,

Arthur

[aleib_borgwarner]

Hey @artvvb

Thank you for the quick response and pointing me in the right direction! I will take a look at the "low-level filter demo" and start moving my efforts towards redesigning the HW; I didn't realize the limited access I had with a SW approach.

Will keep you posted if there's anything else I have questions about!

Thanks again!

[zygot]

19 hours ago, aleib_borgwarner said:

Have an input signal to the ADC -> send signal to DAC in near-real-time. And maybe do some signal modulation in between.

The Eclypse-Z7 is not the ideal platform for this kind of project. Consider looking at something along the lines of the XEM7320. everything will be a lot easier and quicker once you get familiar with their closed framework. That said, you can certainly ignore all of the ZYNQ cores on the Eclypse-Z7 and do everything in the PL, without being tied to any vendor IP like AXI bus implementation ( which can be sketchy ). The old but venerable Z7020 PL is pretty much equivalent to an Artix 75T in terms of resources. Here is such a project that I did a while ago:

There's an XEM7320 version also posted.

If you are going to invest your time and effort into developing an application on an FPGA platform, why not choose one that allows you to use that effort to do more ambitious projects in the future?

Edited July 6, 2023 by zygot

[aleib_borgwarner]

21 hours ago, zygot said:

If you are going to invest your time and effort into developing an application on an FPGA platform, why not choose one that allows you to use that effort to do more ambitious projects in the future?

I agree. Thanks for the additional recommendation. Unfortunately, this project was picked up after the decision to use the Eclypse platform, so for right now we are more or less stuck with that decision, at least for an MVP. Definitely learning its limitations and such though.

Thanks again for the resources!