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Pmod Shield


rehsd

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I see the Pmod Shield has JA, JB, JC, JD, and JE connections. I am using an Arty A7. Am I correct to assume that JA, JB, JC, and JD on the shield are the same as those on the Arty, or are they different?

What about JE? It is on the shield, but the Arty doesn't have a JE. Is it an additional Pmod connection that I can use (just needing the proper mapping in the XDC)?

Thanks!

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On 12/11/2021 at 1:31 PM, rehsd said:

I see the Pmod Shield has JA, JB, JC, JD, and JE connections. I am using an Arty A7. Am I correct to assume that JA, JB, JC, and JD on the shield are the same as those on the Arty, or are they different?

What about JE? It is on the shield, but the Arty doesn't have a JE. Is it an additional Pmod connection that I can use (just needing the proper mapping in the XDC)?

Thanks!

@rehsdIf the Arty A7 already has the JA, JB, ... ports, why do you need the Pmod shield? Can we not use the pmod connectors on the board? Or is it that these PMODs are in addition to those on the board and hence you can have 4 Pmods from the base boards and 5 more from the shield. I have hardly seen response to questions from any Digilent staff. May I request Digilent staff to monitor the forum and respond to questions in a timely manner? 

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12 minutes ago, rehsd said:

@tnkumar, if the shield gives me additional Pmod ports, I can take advantage of them. If the ports are simply duplicates, and I'm only getting one extra Pmod port, I'm guessing I can directly connect to the underlying pins for the JE (5th) connection.

Digilent staff -> Can you speedily respond to questions from customers / potential customers?

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Don't assume/believe anything until you've taken a good look at the schematics of the Pmod Shield and the Arty and its xdc. Some pins might have pullup resistors as they were meant to be used as I2C pins so make sure you're aware which are which. Also, you can find more details about the connectors on Arty's Reference Manual as well.

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The information provided for the Shield does not seem to explain it very well. For example, how can I leverage the Shield JE connector from my Arty? I cannot find a sample XDC file that includes JE, and I'm questioning whether JA on the Arty XDC is the same as JA on the Shield. Regarding JA-JE, the Shield Reference Manual states, "These connectors provide access to the signals of the host in a form factor which readily allows Digilent Pmods to be connected. UART, SPI and GPIO protocols are supported via the Pmod connectors." I have looked at the Shield schematic, but I'm not following how the schematic ties back to the Arty. Or is the shield only supplying JA-JE to an onboard Arduino, and really doesn't have anything to do with the Arty onboard JA-JD connectors?

Product Update Annoucement – Digilent Pmod Shield Rev B

Pmod Shield

Are there any example XDC files, project files, etc. to help understand the Shield better (and how it's intended to be used)?

Thank you.

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Hi @rehsd,

On 12/13/2021 at 4:39 AM, rehsd said:

Or is the shield only supplying JA-JE to an onboard Arduino, and really doesn't have anything to do with the Arty onboard JA-JD connectors?

This is correct. All of the instances in the Pmod Shield documentation that refer to JA, JB, etc., are referring to the Pmod Shield Pmod host ports themselves, not whatever host FPGA/microcontroller it might be placed on top of has in terms of Pmod ports (as an example, an Arduino board has no Pmod Host ports).

The way the Pmod shield makes the connections to the host system is through the pins on the underside of the board to connect to the female IO headers on the host system.

The bit about the SPI, UART, and I2C Pmods on the shield are only relevant for the Digilent microcontrollers since microcontrollers are hardwired to a particular protocol 'engine' on the processor. FPGAs do not have this limitation with pins connected to their fabric as you can configure the FPGA to create a protocol bus of whatever variety you like (limited by speeds, I/O standards, and termination of course, but that's not an issue for SPI, I2C, UART, and GPIO Pmods).

To configure those Pmod ports for something like the Arty A7 35T, you would do something like this in the .xdc (after you add the Pmod IP/Hierarchy and make the Pmod_out connection external, which you can then name to something else) for Pmod JA on the Pmod Shield:

#set_property -dict { PACKAGE_PIN U11   IOSTANDARD LVCMOS33 } [get_ports { Pmod_out_pin1_io  }]; #Arty A7 Arduino header pin 26, Shield JA1
#set_property -dict { PACKAGE_PIN V16   IOSTANDARD LVCMOS33 } [get_ports { Pmod_out_pin2_io  }]; #Arty A7 Arduino header pin 27, Shield JA2
#set_property -dict { PACKAGE_PIN M13   IOSTANDARD LVCMOS33 } [get_ports { Pmod_out_pin3_io  }]; #Arty A7 Arduino header pin 28, Shield JA3
#set_property -dict { PACKAGE_PIN R10   IOSTANDARD LVCMOS33 } [get_ports { Pmod_out_pin4_io  }]; #Arty A7 Arduino header pin 29, Shield JA4

Let me know if you have any questions.

Quote

Digilent staff -> Can you speedily respond to questions from customers / potential customers?

Not on the weekends when the Digilent staff is not working. 

Thanks,
JColvin

 

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16 hours ago, JColvin said:

Hi @rehsd,

This is correct. All of the instances in the Pmod Shield documentation that refer to JA, JB, etc., are referring to the Pmod Shield Pmod host ports themselves, not whatever host FPGA/microcontroller it might be placed on top of has in terms of Pmod ports (as an example, an Arduino board has no Pmod Host ports).

The way the Pmod shield makes the connections to the host system is through the pins on the underside of the board to connect to the female IO headers on the host system.

The bit about the SPI, UART, and I2C Pmods on the shield are only relevant for the Digilent microcontrollers since microcontrollers are hardwired to a particular protocol 'engine' on the processor. FPGAs do not have this limitation with pins connected to their fabric as you can configure the FPGA to create a protocol bus of whatever variety you like (limited by speeds, I/O standards, and termination of course, but that's not an issue for SPI, I2C, UART, and GPIO Pmods).

To configure those Pmod ports for something like the Arty A7 35T, you would do something like this in the .xdc (after you add the Pmod IP/Hierarchy and make the Pmod_out connection external, which you can then name to something else) for Pmod JA on the Pmod Shield:


#set_property -dict { PACKAGE_PIN U11   IOSTANDARD LVCMOS33 } [get_ports { Pmod_out_pin1_io  }]; #Arty A7 Arduino header pin 26, Shield JA1
#set_property -dict { PACKAGE_PIN V16   IOSTANDARD LVCMOS33 } [get_ports { Pmod_out_pin2_io  }]; #Arty A7 Arduino header pin 27, Shield JA2
#set_property -dict { PACKAGE_PIN M13   IOSTANDARD LVCMOS33 } [get_ports { Pmod_out_pin3_io  }]; #Arty A7 Arduino header pin 28, Shield JA3
#set_property -dict { PACKAGE_PIN R10   IOSTANDARD LVCMOS33 } [get_ports { Pmod_out_pin4_io  }]; #Arty A7 Arduino header pin 29, Shield JA4

Let me know if you have any questions.

Not on the weekends when the Digilent staff is not working. 

Thanks,
JColvin

 

Thanks @JColvin. So, if I were to connect the Pmod shield to an Arty S7-50, at a total system level, I will have the PMODs (JA, JB, JC and JD) on the base Arty board and in addition have PMODs provided by the shield. So, in effect, more than 4 PMODs. Is my understanding correct?

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Hi @tnkumar,

That is correct. There are some considerations that you will have to take into account though.

The first, and most critical in my opinion, is logic resources on the FPGA; each Pmod takes some amount of the LUTs and other available logic resources on the FPGA. This can get further compounded if you use the Digilent made IPs which use different AXI peripherals to be able to communicate with the host processor (usually Microblaze on an Arty S7-50). I would highly recommend that you check that the designs you are intending to create are able to successfully fit and run on an Arty S7-50 by generating the bitstreams and if you are using a processor, the Vitis/SDK applications in advance before you buy a wide range of Pmods + the Pmod Shield, if only to save the hassle of returning products you aren't able to use.

The second is that most of Pmod ports on the Pmod Shield have 200 Ohm series resistors. In conjunction with the 200 Ohm series resistors that are also present on the Arduino styled header I/O pins on the Arty S7/A7/etc themselves, this can lead to some unexpected behavior on different modules i.e. slower speed, lower I/O voltage, etc, all potentially leading to the attached Pmod not working. I know I have experienced this first hand with different Pmods.

The third is power consideration. Most Pmods don't need a lot of power, but it's also non-zero amount. The DA9062 should be able to supply 2 amps worth of current on the 3.3 V rail, but Pmods are not the only things in the system that use that 3.3 V line.

My personal opinion, stemming from the second point and the fact that the Pmod Shield is no longer being sold/manufactured, is that if you are not considered about the overall look of the system, you may want to consider just individually wiring additional Pmods to the existing female header on the Arty S7, as that is all the Pmod Shield effectively does. This would also help facilitate using different features of communications like SPI where a number of the same communication lines can be shared between different Pmods, reducing the number of overall I/O used on the FPGA itself. You'd have to get the logic appropriately working to switch between the different modules at that point, but it's an aspect to consider when you have a lot of different modules on one system.

Thanks,
JColvin

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4 hours ago, JColvin said:

Hi @tnkumar,

That is correct. There are some considerations that you will have to take into account though.

The first, and most critical in my opinion, is logic resources on the FPGA; each Pmod takes some amount of the LUTs and other available logic resources on the FPGA. This can get further compounded if you use the Digilent made IPs which use different AXI peripherals to be able to communicate with the host processor (usually Microblaze on an Arty S7-50). I would highly recommend that you check that the designs you are intending to create are able to successfully fit and run on an Arty S7-50 by generating the bitstreams and if you are using a processor, the Vitis/SDK applications in advance before you buy a wide range of Pmods + the Pmod Shield, if only to save the hassle of returning products you aren't able to use.

The second is that most of Pmod ports on the Pmod Shield have 200 Ohm series resistors. In conjunction with the 200 Ohm series resistors that are also present on the Arduino styled header I/O pins on the Arty S7/A7/etc themselves, this can lead to some unexpected behavior on different modules i.e. slower speed, lower I/O voltage, etc, all potentially leading to the attached Pmod not working. I know I have experienced this first hand with different Pmods.

The third is power consideration. Most Pmods don't need a lot of power, but it's also non-zero amount. The DA9062 should be able to supply 2 amps worth of current on the 3.3 V rail, but Pmods are not the only things in the system that use that 3.3 V line.

My personal opinion, stemming from the second point and the fact that the Pmod Shield is no longer being sold/manufactured, is that if you are not considered about the overall look of the system, you may want to consider just individually wiring additional Pmods to the existing female header on the Arty S7, as that is all the Pmod Shield effectively does. This would also help facilitate using different features of communications like SPI where a number of the same communication lines can be shared between different Pmods, reducing the number of overall I/O used on the FPGA itself. You'd have to get the logic appropriately working to switch between the different modules at that point, but it's an aspect to consider when you have a lot of different modules on one system.

Thanks,
JColvin

Thanks @JColvinfor a very detailed answer. It answered all my questions and helped to understand the detailed considerations regarding PMODs and the shield. Thanks 

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@JColvin  since the pmod IP/Hierarchy does not exisit anymore for vivado version 2021, do you just use the xdc file to configure and do not make the connection external?

On 12/14/2021 at 4:11 PM, JColvin said:

Hi @rehsd,

This is correct. All of the instances in the Pmod Shield documentation that refer to JA, JB, etc., are referring to the Pmod Shield Pmod host ports themselves, not whatever host FPGA/microcontroller it might be placed on top of has in terms of Pmod ports (as an example, an Arduino board has no Pmod Host ports).

The way the Pmod shield makes the connections to the host system is through the pins on the underside of the board to connect to the female IO headers on the host system.

The bit about the SPI, UART, and I2C Pmods on the shield are only relevant for the Digilent microcontrollers since microcontrollers are hardwired to a particular protocol 'engine' on the processor. FPGAs do not have this limitation with pins connected to their fabric as you can configure the FPGA to create a protocol bus of whatever variety you like (limited by speeds, I/O standards, and termination of course, but that's not an issue for SPI, I2C, UART, and GPIO Pmods).

To configure those Pmod ports for something like the Arty A7 35T, you would do something like this in the .xdc (after you add the Pmod IP/Hierarchy and make the Pmod_out connection external, which you can then name to something else) for Pmod JA on the Pmod Shield:

#set_property -dict { PACKAGE_PIN U11   IOSTANDARD LVCMOS33 } [get_ports { Pmod_out_pin1_io  }]; #Arty A7 Arduino header pin 26, Shield JA1
#set_property -dict { PACKAGE_PIN V16   IOSTANDARD LVCMOS33 } [get_ports { Pmod_out_pin2_io  }]; #Arty A7 Arduino header pin 27, Shield JA2
#set_property -dict { PACKAGE_PIN M13   IOSTANDARD LVCMOS33 } [get_ports { Pmod_out_pin3_io  }]; #Arty A7 Arduino header pin 28, Shield JA3
#set_property -dict { PACKAGE_PIN R10   IOSTANDARD LVCMOS33 } [get_ports { Pmod_out_pin4_io  }]; #Arty A7 Arduino header pin 29, Shield JA4

Let me know if you have any questions.

Not on the weekends when the Digilent staff is not working. 

Thanks,
JColvin

 

 

Edited by kyh
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Hi @kyh,

The Pmod IPs and Hierarchy still exist, but you are correct in that they have not been tested for newer versions of the Vivado software. You can still the IPs in newer versions and make the pins external and manually constrain them, much like in the same way I mentioned in the post you quoted.
Similarly, you could also use the generic IP blocks for things like SPI or I2C (making sure that the various IP settings for clock rates, data widths, etc are properly set for the Pmod's embedded IC requirements) and then use the existing .c and .h library files, adjusting their settings and variable names as needed to match xparameters.h generated by Vivado/Vitis. This approach will vary in ease of use since different Pmods were just tight wrappers around a single IP and others were more involved than that.

The only time you would not be marking pins as external and only adjusting the .xdc is if you were doing an all HDL design and not using any sort of onboard processor (whether a softcore like Microblaze or an embedded one like the ARM cores on Zynq boards).

Let me know if you have any questions about this.

Thanks,
JColvin

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