Getting Warnings while creating Vivado Project with Zynq Boards

[Zakir Hussain]

Hi im getting these warnings while i try to validate design in Vivado while executing hello world program which makes use of Zynq 7000 boards.

i kindly request you to give a siolution for these warnings

 

[PSU-1]  Parameter : PCW_UIPARAM_DDR_DQS_TO_CLK_DELAY_2 has negative value -0.009 . PS DDR interfaces might fail when entering negative DQS skew values. 

[PSU-2]  Parameter : PCW_UIPARAM_DDR_DQS_TO_CLK_DELAY_3 has negative value -0.033 . PS DDR interfaces might fail when entering negative DQS skew values. 

[Niță Eduard]

Hello @Zakir Hussain,
These warnings appear in versions of Vivado greater than 2017.4. The > 0ns requirement was introduced to be in line with non-Zynq MIG-based designs, where negative delays were never permitted. 
You can ignore these warning, since for Zynq based designs they won't cause any issues.

For more information regarding the warning, please see this section of the reference manual.

Best wishes,
Eduard