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Found 9 results

  1. Hello, everyone. I am having difficult finding a guide or solution to this problem. I would like to simply connect a switch (G15 on the Z720) to my custom IP that should toggle a Clean or Distortion signal. For some reason I am unable to insert a link to the Block Diagram: In the diagram you can see that I had originally just made CTRL external and added it to the constraints file for pin G15, but this did not work. I'm think that I need to instantiate GPIO in Vitis to use this method, but so far I haven't had any luck. My next thought was to use the AXI_GPIO block and somehow tie it to both sws_4bits and the CTRL port on Serialeffects, but that is what I cannot figure out how to do. Does anyone have a resource for learning how to do this? I'm open to any suggestions, as I would eventually like to use the 4 switches on the board to control different audio effects, such as chorus, echo, etc.
  2. I need to use the JTAG header to program the Zedboard, since the MicroUSB connector is physically damaged. I cannot find any documentation or forums about how to use the JTAG connector for programming the FPGA, so I am going to ask for your help. I have a basic design in Vivado for making switch 0 toggle led 0. The bitstream is ready to be sent to the FPGA. However, when I try to connect to the hardware, by clicking "Open target", it is unable to connect. When I try to manually connect: I am using Xilinx Platform Cable USB adapter for connecting the JTAG to the computer's USB input: I have the driver installed, and it appears in my list of devices when plugged in, and disappears if I unplug it, and is up-to-date: I suspect the jumpers may not be configured properly? But again I cannot find clear documentation on how to set this up. This is how mine is set up: Here is some information about my computer: I am using Vivado 2016.1, since that is used in a lot of the tutorials. I think the Diligent tutorial uses 2016.2. It also comes with the Zedboard board file, although I downloaded the one made by Diligent as instructed in the tutorial. I hope I have provided enough information. I appreciate any help!
  3. How can I access Ethernet port of any FPGA to transfer data from PC to FPGA and vice versa.
  4. Hi im getting these warnings while i try to validate design in Vivado while executing hello world program which makes use of Zynq 7000 boards. i kindly request you to give a siolution for these warnings [PSU-1] Parameter : PCW_UIPARAM_DDR_DQS_TO_CLK_DELAY_2 has negative value -0.009 . PS DDR interfaces might fail when entering negative DQS skew values. [PSU-2] Parameter : PCW_UIPARAM_DDR_DQS_TO_CLK_DELAY_3 has negative value -0.033 . PS DDR interfaces might fail when entering negative DQS skew values.
  5. I would like to integrate PMOD NIC100 with Microzed board with Zynq 7020 running on linux. I have a SPI interface routed through the PL logic. Are there any IP that can be directly imported to Vivado for this ? OR Are there any drivers that can be installed on the linux ? Please suggest.
  6. Hey everybody, new guy on the forums. I bought some Zynq-7000 based boards for my team and decided to go ahead and sign up and maybe learn some new stuff from you guys. I've been in electronics design since 92, working in all sorts of fields (military, commercial, automotive, avionics, academia) for some big companies (Boeing, Motorola, Philips Semiconductor) and some small companies (Nichols Research, Elesys, Universal Avionics) doing all sorts of fun things. Not really doing a lot of design right now, but I manage a team of guys doing a lot of design. We are mainly the ASIC/FPGA group at my company, designing logic for avionics systems, and doing DO-254 based validation and verification trying to keep the FAA & EASA happy. I do like to fiddle around with some home/hobby projects from time-to-time, though. Right now I'm working on a robust temperature probe for my grill that'll be able to withstand all the abuse I can give it and still send messages to my phone about the status of my pork butt I'm smoking. I'm also working out the conceptual design of a fermentation monitor that'll keep track of specific gravity and let me know when my beer is ready and what it thinks the ABV is. Anybody working on topics like these please reach out and let's compare notes!
  7. Is it possible to connect PCAM 5C into Zynq-7000 through a XADC pmod (using some adapter)? Is there any tutorial, example and or suggestions how to do that?
  8. We are using PL section of the Zynq7000 to transfer data to another module b y creating a SPI IP Inside the PL. We want to know that the PMOD pins availvalble on the Zybo-Z710 board are using open drain or push-pull configuration ? Do they have something like a internal pull-up resistor ? Please let me know.. Regards Amol
  9. I am trying to run the "Hello world" program on my Zynq 7000 family board. The issue which is happening is i am not able to see the output of the program on my Terminal. I am using the SDK terminal for seeing the output. I have already gone through some videos from xilinx on SDK and i am following the same steps as they did. One day before, it was working fine but, i am really unable to figure out what is the issue now. I am a kind of a newbee in using Viavado and SDK, so it will be really great if some one can help me out. I am using Vivado 2019.1. So these are the steps which i am following: 1) Created a block diagram in Vivado and generated the bitstream. We can see that i am using UART1 and GPIO in peripherals. 2) Then I launched SDK from Viavdo and Created a new Application project. Then i used the "Hello world" template and created the BSP. 3) I created a "Run configuration", connected my terminal, Programmed my FPGA and then Launched the program on Hardware. Please let me know if any other information is needed. Thanks Amol