chaitusvk Posted January 7, 2020 Share Posted January 7, 2020 I have time stamp on video in real time as shown in fig ,I have Zybo Z7 FPGA board can any one please help me how to text overlay and how the overlaying text can be changed dynamically please guide me .. Thanks in advance .... Link to comment Share on other sites More sharing options...
vicentiu Posted January 7, 2020 Share Posted January 7, 2020 Do you plan on using Linux or just FPGA (and possibly baremetal)? Link to comment Share on other sites More sharing options...
chaitusvk Posted January 7, 2020 Author Share Posted January 7, 2020 1 hour ago, vicentiu said: Do you plan on using Linux or just FPGA (and possibly baremetal)? I can use linux .... and i want to use HLS Link to comment Share on other sites More sharing options...
vicentiu Posted January 7, 2020 Share Posted January 7, 2020 It might be more appropriate to not use linux... I'm going to move the thread to the FPGA area for better visibility since your question is mostly FPGA oriented. Link to comment Share on other sites More sharing options...
elodg Posted January 10, 2020 Share Posted January 10, 2020 Essentially, you will have to decode the DVI input, count the pixels, replace the right pixels and encode the DVI output. Check https://github.com/Digilent/Zybo-Z7-20-HDMI for a bare-metal example for video buffering and forwarding. You can overwrite the right pixels in the frame buffer in software or in FPGA by manipulating the video stream on the AXI4-Stream bus. Ready-made IP: https://www.xilinx.com/products/intellectual-property/ef-di-vid-mix.html Good luck! Link to comment Share on other sites More sharing options...
chaitusvk Posted January 17, 2020 Author Share Posted January 17, 2020 On 1/10/2020 at 3:53 PM, elodg said: Essentially, you will have to decode the DVI input, count the pixels, replace the right pixels and encode the DVI output. Check https://github.com/Digilent/Zybo-Z7-20-HDMI for a bare-metal example for video buffering and forwarding. You can overwrite the right pixels in the frame buffer in software or in FPGA by manipulating the video stream on the AXI4-Stream bus. Ready-made IP: https://www.xilinx.com/products/intellectual-property/ef-di-vid-mix.html Good luck! Thank you very elodg .... Link to comment Share on other sites More sharing options...
chaitusvk Posted January 22, 2020 Author Share Posted January 22, 2020 On 1/10/2020 at 3:53 PM, elodg said: Essentially, you will have to decode the DVI input, count the pixels, replace the right pixels and encode the DVI output. Check https://github.com/Digilent/Zybo-Z7-20-HDMI for a bare-metal example for video buffering and forwarding. You can overwrite the right pixels in the frame buffer in software or in FPGA by manipulating the video stream on the AXI4-Stream bus. Ready-made IP: https://www.xilinx.com/products/intellectual-property/ef-di-vid-mix.html Good luck! @elodg I tried running demo after compiling in VIVADO 2019.1 , but it shows HDMI unplugged, but my PC is detecting the port please confirm me that first i have to choose 1. Display resolution and then 2. I have to start streaming with option "5" Link to comment Share on other sites More sharing options...
chaitusvk Posted January 27, 2020 Author Share Posted January 27, 2020 On 1/17/2020 at 6:53 AM, chaitusvk said: @elodg i have tried pixel blackout in place of logo with VIVADO HLS , but how to save the logo it is taking 4kb space .... On 1/10/2020 at 3:53 PM, elodg said: Essentially, you will have to decode the DVI input, count the pixels, replace the right pixels and encode the DVI output. Check https://github.com/Digilent/Zybo-Z7-20-HDMI for a bare-metal example for video buffering and forwarding. You can overwrite the right pixels in the frame buffer in software or in FPGA by manipulating the video stream on the AXI4-Stream bus. Ready-made IP: https://www.xilinx.com/products/intellectual-property/ef-di-vid-mix.html Good luck! Link to comment Share on other sites More sharing options...
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chaitusvk
I have time stamp on video in real time as shown in fig ,I have Zybo Z7 FPGA board can any one please help me how to text overlay and how the overlaying text can be changed dynamically
please guide me ..
Thanks in advance ....
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