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Found 13 results

  1. Hi, I am trying to make a project where I can receive a digital data and store it in DDR memory, I want to ask how can I connect one of the HP PMOD port let say JC on Zyboz7 board with an external source ? Thanks
  2. Hello! I am still new to all of this so bare with me. I am creating a project that involves the JSTK2 PMOD and right now I want to test the PMOD on its own with the example codes on the Diligent GitHub before integrating to my system. However, I am getting stuck at generating a bitstream. I have already done this successfully in another RTL project with the KYPD PMOD and there were no problems. I will share a screenshot of my block design. I am using the Zybo Z7-10 and I am using Vivado 2021.1. I used this link to help me get started with my IP: https://digilent.com/reference/learn/programmable-logic/tutorials/pmod-ips/start Like I mentioned this worked for the KYPD PMOD. Let me know if anything else is needed to help debug this. Here are the error messages: [DRC NSTD-1] Unspecified I/O Standard: 4 out of 138 logical ports use I/O standard (IOSTANDARD) value 'DEFAULT', instead of a user assigned specific value. This may cause I/O contention or incompatibility with the board power or connectivity affecting performance, signal integrity or in extreme cases cause damage to the device or the components to which it is connected. To correct this violation, specify all I/O standards. This design will fail to generate a bitstream unless all logical ports have a user specified I/O standard value defined. To allow bitstream creation with unspecified I/O standard values (not recommended), use this command: set_property SEVERITY {Warning} [get_drc_checks NSTD-1]. NOTE: When using the Vivado Runs infrastructure (e.g. launch_runs Tcl command), add this command to a .tcl file and add that file as a pre-hook for write_bitstream step for the implementation run. Problem ports: Pmod_out_0_pin10_io, Pmod_out_0_pin7_io, Pmod_out_0_pin8_io, and Pmod_out_0_pin9_io. [DRC UCIO-1] Unconstrained Logical Port: 4 out of 138 logical ports have no user assigned specific location constraint (LOC). This may cause I/O contention or incompatibility with the board power or connectivity affecting performance, signal integrity or in extreme cases cause damage to the device or the components to which it is connected. To correct this violation, specify all pin locations. This design will fail to generate a bitstream unless all logical ports have a user specified site LOC constraint defined. To allow bitstream creation with unspecified pin locations (not recommended), use this command: set_property SEVERITY {Warning} [get_drc_checks UCIO-1]. NOTE: When using the Vivado Runs infrastructure (e.g. launch_runs Tcl command), add this command to a .tcl file and add that file as a pre-hook for write_bitstream step for the implementation run. Problem ports: Pmod_out_0_pin10_io, Pmod_out_0_pin7_io, Pmod_out_0_pin8_io, and Pmod_out_0_pin9_io. My assumption is that my constraints aren't defined properly but I am not sure where to go from there. Any advice/help would be greatly appreciated. Thank you!
  3. I am getting starting with Vivado_HLS 2018.2 and the zyboZ7-20 board. When attempting to create a project I find no default setting for the zyboZ7-20 board in the Vivado HLS "Part Selection". What is the recipe for giving the zyboZ7-20 board information to Vivado HLS? I see there are some examples using Vivado, but none using Vivado HLS. Being new at this, step-by-step would be very helpful. Thanks
  4. Disclaimer: I'm not an expert, just a student working on a school project. My zybo z7 board stopped showing up as /dev/ttyUSBx on my linux vm when connected using the UART microUSB port. On my windows host the com port does show up but I cannot open a connection with putty (115200 8n1), no error info or strange characters, just an error sound effect with no explanation. I tried everything on the pc side (driver reinstall, reboot, enable/disable port, different ports, different cables) but I suspect that it is the board not communicating. I use external power with WALL selected and booted from an sd card with a 500 mb fat32 partition with a boot and image file generated with xilinx petalinux which were not changed from when everything worked fine. There is also a 3gb ext4 partition where the fs is. The only thing that changed before the problem occured is that a few to-be-tested precompiled kernel modules where added to the ext fs in the home folder. Other students with the same set-up do not have this problem. I tried different sd cards and remade the partitions and redid the boot/image/fs generation but no success. When booting from QSPI the example program works fine so I don't think the board is broken (The serial com doesn't work in QSPI either but I don't know if it's supposed to). Maybe it needs some kind of factory reset? Is there a way to confirm if the microUSB port is working? Help will be appreciated. btw: upon startup I can see the RX led flickering but never the TX led
  5. Hello, I have just recieved my new board and jumped into the example tutorials using Vivado (2 hours to install) only to find when you get to launching the SDK that is is no longer there. Now you need Vitis (3 more hours install) but I am not finding much support in how to develop for a beginner. Can anyone point me to reasonable guides that are specific to the Zybo Z7? Thanks
  6. Hi, I am using Zybo Z720 and Pmod ESP32 to explore on IoT control. I used several AT commands like "AT+CWMODE", "AT+CWJAP", "AT+CIPSTART", "AT+CIPSEND" and "GET <links>" to receive the last entry data from the Thingspeak. Here is the response I received from the Vitis Serial Terminal: Now, I want to make use of this data from +IPD response and control the GPIO and relay (relay connected to the GPIO pin). I know Arduino has sth like Serial.find() function and help me with extracting serial terminal's IPD response. I just wonder Xilinx Vitis has the same thing as Arduino. The Arduino used the code as following: if(Serial.available()>1) { String response = Serial.read(); Serial.println(response); } The Vitis code is attached below Thanks in advance IoTControl_New.txt
  7. I am looking at the petalnux demo here https://reference.digilentinc.com/reference/programmable-logic/zybo-z7/demos/petalinux and https://github.com/Digilent/Petalinux-Zybo-Z7-10. These are a good resource. I am anxiously awaiting the update to 2020.1. However, I would can you include or provide here a list of the steps need to recreate the functionality in the distributed BSP. You don't need to provide in depth instructions as we can reference the provided petalinux project. For instance, I don't even know where to start looking for how to configure the HDMI video driver on a new project. With a list of steps on how to recreate the project from scratch it will be a better learning tool. thanks!
  8. Can someone show me how to enable a GUI for the petalinux project available here: https://github.com/Digilent/Petalinux-Zybo-Z7-10 I changed it to have an external rootfs on the SD card and activated the matchbox desktop session in the rootfs configuration, but when it boots I get the following error: # matchbox-desktop ** (matchbox-desktop:1242): WARNING **: Cannot open display: Not sure how to get the HDMI display working...
  9. Hello, Can you say me why zybo didnot update the bsp version of zyboz7 board ? I see that they have only 2017 version . My petalinux version is 2018.3 and vivado is 2018.3 . So it giving me error failed to generate the rootfs while building project in the petalinux . It also says that No such file or directory. I search many forums and find that this is the problem with the bsp version. Does anyone know how use the 2017 zybo bsp with higher version of petalinux ? I used this commads petalinux-create -t project -s /home/kawser/PetaLInux/zybo.bsp petalinux-config --get-hw-description /home/kawser/PetaLInux/ petalinuxb-build
  10. I am trying to connect my PMOD MTDS to the Zybo Z7, without Arduino. I have integrated the IP files, connected it via block diagram, and set up a FAT32 microSD with the 2 files that are needed also. When trying to connect to Vivado I can seem to figure out how to get to the console for which I can do MTDS Firmware code so I can do a custom UI. Documentation does not help much with connecting this PMOD. Please advise if you're familiar thanks.
  11. Hello friends, I'm trying to implement ov9281 camera on my zybo z7-20, I'm using pcam 5C demo project, so far i have achieved damaged frames from camera(included pictures) can someone help me understand what's wrong with it, why its damaged? btw I'm using digilent's mipi IPs and on pictures you can see the highlighted spots are flashlights shining on camera.
  12. I have time stamp on video in real time as shown in fig ,I have Zybo Z7 FPGA board can any one please help me how to text overlay and how the overlaying text can be changed dynamically please guide me .. Thanks in advance ....
  13. Hello all, I am trying to set up a CAN communication between a ZYBO Z7 Board with a PmodCAN Controller (connected on JE) and a Raspberry PI 3 using a Niren CAN Module as Controller. Letting 2 Raspberries communicating which each other via SocketCAN works fine, both can send and receive CAN data. Now if I try to let the Zybo communicate with the Raspberry using the example codes for transmit and receive data there seems to be no data on the bus. Neither the Zybo receives any data from the RPi nor the RPi from the Zybo. I have created a block design and tried the example codes according to the guide from the digilentinc website here . The LoopBack example does work as intended, Tera Term shows the messages being send, fetched and received. Just when I try to send data from the RPi the Zybo waits endlessly and any data send out from the Zybo wont be caught by the RPi. I have tried different bitrates to no avail. Any help or directing towards the right path in case i am way off in what i am trying is greatly appreciated. The block design is attached. Cheers