Microblaze AXI GPIO Interrupt

[newkid_old]

I am trying to implement an interrupt routine on my Arty board.  I want to use the switches on the board to generate the interrupt.  Here is my design:

I used the example code that Xilinx offers and here is my code.  At start up I initialize my IO and then my interrupt.  Sometimes when the EnableExceptions function is called the program will jump to the interrupt vector but it locks up there.  Most of the time however the interrupt setup is run and the while() loop in my main program works but the interrupt won't trigger with the switch.  Any help is greatly appreciated.

 

helloworld.c

[jpeyron]

Hi @shyams,

When I looked further into the helloworld.c it appears that the interrupt functionality is not being used. 

I created a Arty-A7-35T Vivado 2018.2 gpio interrupt project here using the xgpio_intr_tapp_example.c provided by xilinx SDK code found here: C:\Xilinx\SDK\2018.2\data\embeddedsw\XilinxProcessorIPLib\drivers\gpio_v4_3\examples.

Looking at the main function of the xgpio_intr_tapp_example.c the main function does not poll for data but rather uses the GpioIntrExample function.

I have attached screen shots of the Vivado block designs.

Spoiler

 

int main(void)
{
    int Status;
    u32 DataRead;

      print(" Press button to Generate Interrupt\r\n");

      Status = GpioIntrExample(&Intc, &Gpio,
                   GPIO_DEVICE_ID,
                   INTC_GPIO_INTERRUPT_ID,
                   GPIO_CHANNEL1, &DataRead);

    if (Status == 0 ){
        if(DataRead == 0)
            print("No button pressed. \r\n");
        else
            print("Successfully ran Gpio Interrupt Tapp Example\r\n");
    } else {
         print("Gpio Interrupt Tapp Example Failed.\r\n");
         return XST_FAILURE;
    }

    return XST_SUCCESS;
}

 

 

best regards,

Jon

[jpeyron]

Hi @newkid_old,

Here is a verified Vivado 2018.2 Arty-A7-35T gpio interrupt project using your SDK code. Please download and run this project. Do you get the expected results. If not please attach screen shots of your serial terminal output.

thank you,

Jon

[newkid_old]

Jon,

I downloaded the project and found that I had an older version of Vivado.  I downloaded the newest version.  I didn't realize its 2018.3 until I opened the project.  Now I can't get the project I downloaded from you or my older projects to transmit a simple hello world.  Any ideas?

[jpeyron]

Hi @newkid_old,

I updated and verified the  project linked above for Vivado 2018.3.  All you need to do is re-download the project from the link above. 

cheers,

Jon

[shyams]

Hi @jpeyron

Can you share the 2018.2 version of the code as well.

If possible can you attach the bd file as pdf or image so that we could view it.

 

Thanks

Shyam S

[jpeyron]

Hi @shyams,

Welcome to the Digilent Forums!

I have attached screen shots of the block design for the Vivado 2018.3 version of the Arty-A7-gpio interrupt project. I attached the SDK code as well.

best regards,

Jon

 

helloworld.c

[shyams]

Thanks  @jpeyron

In the helloworld.c inside main function i can see a loop which reads from GPIO and outputs it. I am not able to comprehend where does interrupt in GPIO comes to play.

It will be helpful if u explain

 

Shyam S

[shyams]

Hey @jpeyron,

Thanks for the files you had shared. I have a simple doubt. Through this I was able to design.

My requirement is that slave device required to be connected to the FPGA generates interrupt and the signal goes high and remains stable till the device is acknowledged. But when device is acknowledged with use of your program it is again going to interrupt service routine because the signal goes from high to low. I want to make sure that interrupt is serviced only when the rising edge is detected. I am using Axi GPIO with Axi Interrupt controller as in the above design.

Also with your design i tried button and led glow. When pressing button there is interrupt generated and when button is released another interrupt. I had checked the debounce condition as well. It is proper. Any idea to help me out such that interrupt gets called only when the button is pressed and not released?

It would be helpful if we can connect through faster means as well.

Thanks and Regards

[JColvin]

Hi @shyams,

I believe the AXI interrupt triggers on any transition and you aren't able to modify it to only have it look for low -> high or high -> low transitions; you would need to set up that edge check polarity in software, but I am double checking this.

What do you mean by "it would be helpful if we can connect through faster means as well"?

Thanks,
JColvin

[shyams]

Hey @JColvin,

Yes your are correct. I just want to detect low -> high transitions. Which parameter to change in software to get the edge check polarity right?

Connect through faster means denoted communication between people other than forum.

Regards

Shyam S

[JColvin]

Hi @shyams,

Normally in software you would create a variable to have a last known state (which for something like an external I/O device) can usually be predetermined and compare the last known state to the current state.

I looked more into the AXI interrupt controller IP (Xilinx PG099) and learned that by default level detection is used, which might be the reason the ISR is occurring multiple times, though supposedly the interrupt handler should clear the interrupt after it is serviced for level driven interrupts. Based on what you are describing, you'll probably want Edge driven interrupts, which can be configured in AXI Interrupt Controller IP (described in Chapter 4 of the guide I linked). The document mentions that this methodolgy is not recommended for Microblaze designs, though I do not know why this is the case. There is also a table in the document that discusses how edge driven interrupts require more clock cycles before an interrupt is recognized by the IP core, but I do not know the full implications on this. The engineers on the Xilinx Forum would be better equipped to discuss any finer details of their IP, though this Xilinx forum thread seemed to be of some use.

The Digilent forum is the primary means of communication for Digilent support, primarily because it provides a later viewable source of information for other users with a similar question and because the nature of support surrounding Digilent products requires a visual based format. You can read some more details about this on our page here.

Thanks,
JColvin

[zzzhhh]

On 3/18/2019 at 6:25 PM, jpeyron said:

Hi @newkid_old,

Here is a verified Vivado 2018.2 Arty-A7-35T gpio interrupt project using your SDK code. Please download and run this project. Do you get the expected results. If not please attach screen shots of your serial terminal output.

thank you,

Jon

Thank you and other guys discussing interrupt on MicroBlaze. I was also stuck at first with my own AXI4 peripheral IP which outputs interrupt signal. Your SDK code helped me find out what I was missing.

PS, in my Vivado/Vitis 2022.2.2 project, calls to XIntc_MasterEnable and microblaze_enable_interrupts are not needed. And I call XIntc_LookupConfig before XIntc_Initialize. Finally, the second argument of Xil_ExceptionRegisterHandler should be the ISR function because INTC_HANDLER is undefined in current version of Vitis. I'm pretty surprised that we still need to call exception related APIs since I think I have done all the initialization and configuration work for interrupt, so why bother setting up exception? This is what I was missing.

It's so sad to see you go, Jon. I can't imagine a current Digilent staff could carefully read a customer's question, not to mention creating a working project to answer the question.