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canisio's Achievements


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  1. Thanks @thinkthinkthink. I'm trying to build this Plinux version right now. Also, with a few adjustments on the tcl script I was able to open the HW project in Vivado. Let's see if I can modify and use it.
  2. Hi @jpeyron ans @Tim S. Any updates on this? My plan was to use this Base Linux project as a kick start for my own project, and this license issue is preventing me to customize the hardware. BTW, any changes on upgrading the Petalinux releases? 2017 was 5 years ago. Thanks much.
  3. I just found the solution. The board files structure is a bit different in the 2021 version. I am using Ubuntu OS and the easiest way for me was: 1 - Download the board files using Vivado (at the end of any Vivado project creation). 2 - Copy the board folder from /home/<USER>/.Xilinx/Vivado/2021.1/xhub/board_store/xilinx_board_store/XilinxBoardStore/Vivado/2021.1/boards/Digilent to /<XILINX_PATH>/Xilinx/Vivado/2021.1/data/xhub/boards/XilinxBoardStore/boards/Xilinx
  4. This procedure does not work for Vitis HLS... I know that what really matters for the HLS process is the FPGA part, but it would be nice to configure the Board. Vivado 2021 let you download Digilent board files directly from the part selection, but Vitis does not have this feature. The /data/boards/board_files is also absent in this version.
  5. Thanks @DerekM. I'll definitely check it out.
  6. Thank you for your explanation @JColvin . I’ve used XGpioPS with MIO50 and MIO51. So if I just want to use J7 as GPIO (no fancy Pmod), all I need to do is to activate them in the Zynq IP (vivado) and then use the XGpioPS drivers? Thanks again.
  7. Hello all, I'd like to connect a Pmod peripheral to the JF connector of Zybo z7-20, however, looks like the board files do not include this interface. When I open a new block design on Vivado, the "board" tab shows only JA through JE connectors. Do I have to manually map it? Maybe use the master xdc file? I'm using Vivado 2018.2 and the "new" board files from github. Thanks!
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