basys3 led's do not turn off completely

[tpg56]

Hi,

I am trying to learn verilog and digital design using basys3 and vivado (webpack) tools. I implemented a jk flip flop using the following logic:

module jk_flip_flop (
    input [1:0] sw,
    input clk,
    input btnC,
    output reg [0:0] led);
    
    always @ (posedge clk)
        begin
            if (btnC == 1)
                led[0] = 0;
            else
                begin
                    if (sw[0] == 1)
                        begin
                            if (sw[1] == 1)
                                led[0] <= ~led[0];
                            else
                                led[0] <= 1;
                        end
                    else
                        begin
                            if (sw[1])
                               led[0] <= 0;
                        end
                end
        end 

endmodule

What I see is when sw[0] and sw[1] are both 1 and if the previous led state was 1, the led does not turn off completely (it just gets dimmer). What could be the problem here, and how would I go about fixing it? I also tried using other LEDs on the board and each had the same problem.

Thanks.

[hamster]

Hi

Ifi I read the code correctly, every clock tick, is the switches are on then the LED is toggled.

The led is being on half the time, giving you a not so bright LED.

[tpg56]

Ah, yes, that was it. Thank you! 

[Milla]

 

On 7/3/2015 at 6:06 AM, hamster said:

Hi

If i I read the code correctly, every clock tick, is the switches are on then the LED is toggled.

The led is being on half the time, giving you a not so bright LED.

Well that was a very clear practical answer. I wonder when i was reading about JK Flip Flop i found nothing about the non transient response.