What voltage standard for SDRAM and Reset on Nexys Video

[D@n]

Hello all!

I'm trying to do some work with a Nexys Video board, and came across an error regarding the voltage standard of the DDR3 SDRAM and the CPU_RESETN line.

According to the schematic, these two wire sets (on the same bank) are at 1.5V.

According to the master XDC file, however, the CPU_RESETN line is listed as 1.2V.

According to the board definition file, the DDR3 lines are 1.5V's.

Can you tell me which is is?

Thanks!

Dan

[jpeyron]

Hi @D@n,

Good catch! The CPU_RESETN is on bank 35 which is 1.5V. It should be IOSTANDARD LVCMOS15.  I have passed this on to get this fixed. I reached out to our design engineer about this and found out the IOSTANDARD LVCMOS12, IOSTANDARD LVCMOS15 and IOSTANDARD LVCMOS18 sets the Vin low to 35% of the bank voltage and Vin high is set to 65% of the bank voltage. In this case it should not change the behavior at all.

cheers,

Jon

[D@n]

Thanks, @jpeyron!

The design behaviour might not change one way or another, but the design is building one way (1.5V w/ SDRAM) and not the other.  (It was building and working with 1.2V, but w/o SDRAM ..)

Dan