GENESYS 2 BOARD

[Lakshmi morla]

Hello Digilent community,

I have an error message which states and asks version of hard ware,This is as follow If you have information regarding this please reply

"Starting FPGA-in-the-Loop test ...
Generating FPGA programming file ...Passed
Programming FPGA ...Passed
Checking Ethernet connection ...Passed
Running FIL simulation ...Failed
Error:Did not receive version information from the hardware. You must have a valid connection, a compatible development board, and compatible versions of the block and FPGA programming file."

This is printed over matlab console , Please help me if you know any information regarding this

with regards

Lakshmi Morla.

[jpeyron]

Hi @Lakshmi morla,

I believe there is a trouble shooting section in the HDL Verifier documentation. Here is a link to the mathworks Setup and Configuration if you haven't see this. It's possible its a network setting issue but we do not have Matlab so I would not be able to trouble shoot this issue. Have you tried reaching out to Mathworks forums here?

cheers,

Jon

[Lakshmi morla]

Hi @jpeyron

Thank you for your suggestion regarding the issue and tried all those solutions but could not solve the issue.  I just like to know whether genesys2 board contains any information regarding its version or revision i.e "H" in it.

I also got one Pynq Z1  board and included board files of arty-z7-20 in path but preset for zynq processor IP in vivado 2015.2 is not working .Please suggest anything regarding this issue.

With Regards,

Lakshmi Morla

 

[jpeyron]

Hi @Lakshmi morla,

I just checked with our design engineer and they do not believe that the EEPROM for the Genesys 2 has the version or revision stored in it.  I did find a forum question on the Matlab website here that talks about trying the JTAG communication interface instead of Ethernet and why.

About the Pynq-Z1 development board could you be more specific about the issue? Screen shots of your design, what errors are you getting? 

cheers,

Jon

[JColvin]

This was a response to jpeyron by the original poster, but it got placed as a report on the post rather than a reply. Here is the post of what I presume was intended to be posted:

Hi jpeyron,

thank you very much for your kind cooperation and for the information regarding my issue . you have mentioned apost in matlab community is posted by me and i have tried over jtag same error persist. I am unable to debug the cause that is the main issue.

But anyway once again thank you for your kind  support to me.

with regards,

Morla Lakshmi Sai kumar