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IOXP Pin Assignments


dfergenson

Question

I've been looking through the technical documentation and schematics for the IOXP pin assignments. I hope that I'm not just the world's biggest idiot here but I'm having a lot of trouble figuring the pin assignments out from the documentation. They just don't seem to be given at all in most cases and the ones at https://reference.digilentinc.com/reference/pmod/pmodioxp/start appear to be inconsistent with the hardware that I have in front of me.

For example, in the documentation, J1 and J2 both have twelve pins but the pin assignments at refer to 8 pin headers for those. J3 has eight pins and only 3 are assigned and those don't correspond to the inputs that they would line up with on a standard Pmod. On the schematic, J1 and J2 do, however, refer to 12 pin headers.

If I understand the schematic of the ADP5589 data sheet correctly (http://www.analog.com/media/en/technical-documentation/data-sheets/ADP5589.pdf), the RST, SDA and SCL inputs really seem like they should be found on input header J3, along with Vcc and Ground (not documented). And there should be 19 bidirectional digital input/outputs, R0 through R7 and C0 through C10, that I would assume would be distributed between J1 and J2. On the schematic (https://reference.digilentinc.com/_media/reference/pmod/pmodioxp/pmodioxp_sch.pdf), C0 through C3 and R0 through R3 are on J1, C4 through C7 and R4 through R7 are on J2 and C8 through C10 are on J4 which is not referred to in the documentation.

So, am I missing something very obvious or is the documentation incomplete/incorrect? And since the schematic contradicts the documentation but seems to be more closely aligned with the part in front of me, do I assume that the schematic is correct?

In either case, does anyone have definitive pin assignments on this? And can a Digilent engineer please update the doc wiki to reflect them?

If nobody has this information, I'll have to do some detective work and will post the pin assignments here.

For completeness: I am using the IOXP on a Nexsys4 CDR attached to header JC, pins 3 through 6 and 9 through 12. I am planning to drive it using I2C coded in VHDL.

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Hi @dfergenson,

Thank you for pointing this out. The schematic is accurate. I would use the schematic for your project for now. We are updating our manual to better reflect the pin out. Unfortunately we do not have a FPGA project for the PmodIOXP. We do have an MPIDE/Arduino styled demo/library on the resources page here that should help with interacting with the PmodIOXP once you have established good communication between the Nexys 4 and the PmodIOXP. There is a chipKIT IOXP reference Manual in the downloaded demo/library that should be a good reference as well.

cheers,

Jon

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Hello,

I've updated the reference manual for the Pmod IOXP to reflect the pin headers: https://reference.digilentinc.com/reference/pmod/pmodioxp/reference-manual. I would like to update the manual further with some more details on how to configure and work with the ADP5589, but I want to update the manual cleanly in one go rather than having it be in flux for a time where everybody besides me is confused about the state of the reference manual. I'm hoping that'll be done later this week.

Thanks,
JColvin

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