rb251415 Posted March 8, 2017 Share Posted March 8, 2017 I am working on a school project making a sound (tone/ multi-tone) generator using a BASYS3 and Vivado. I am having trouble getting the sound part out. As a test I wrote a simple VHDL program to create a 357Hz square wave. I declared an output bit 'dataout'. I ran a simulation using Aldec-HDL Student Edition and I am getting the output squareware. I am using the PmodAMP2 connected to JB1 top row. In my xdc file I have dataout assigned to A14 ##Pmod Header JB ##Sch name = JB1 set_property PACKAGE_PIN A14 [get_ports {dataout}] set_property IOSTANDARD LVCMOS33 [get_ports {dataout}] I have connected stereo headphones to the PmodAMP2 jack. I get NO sound output. To test my board and program I set all the leds to light thru the counter. They work and flicker at different rates relative to where they are in the counter. But still no sound. What I am doing wrong? Is PmodAMP2 the right add-on to use or should I try PmodR2R? It shouldn't matter, but are the headphones causing the issue? The ref. sheet says 2.5 watt output. I also have questions about outputting integer values to the PmodAMP2 or PmodR2R. The BASYS3 and Pmod Reference manuals are not helping. One of my planned files has an integer range -92000 to 92000 (roughly). Please help! Link to comment Share on other sites More sharing options...
D@n Posted March 8, 2017 Share Posted March 8, 2017 @rb251415, I've got the PModAMP2 on my desk right now, and I was just listening to doorbell sounds on it the other day. You can find my Verilog driver here, and an example piece of software driving it here. The problem you are having with your AMP2 sounds like you haven't set the "SHUTDOWN_n" pin high. You can find the reference manual here, and you can also find the schematic here. Dan Link to comment Share on other sites More sharing options...
rb251415 Posted March 8, 2017 Author Share Posted March 8, 2017 I created an output bit sound enable {senb} and force it high when the counter enable is high. I tied it to board output JB3:B15 ##Pmod Header JB ##Sch name = JB1 set_property PACKAGE_PIN A14 [get_ports {dataout}] set_property IOSTANDARD LVCMOS33 [get_ports {dataout}] ##Sch name = JB3 set_property PACKAGE_PIN B15 [get_ports {senb}] set_property IOSTANDARD LVCMOS33 [get_ports {senb}] I ran the simulation on Aldec-HDL and it shows senb to be operating correctly. I still do not get sound. I will check for voltage at JB3:B15 next. Any other ideas? Link to comment Share on other sites More sharing options...
rb251415 Posted March 8, 2017 Author Share Posted March 8, 2017 I am getting 3.3v across JB3:B15 and 1.62v across JB1:A14 Link to comment Share on other sites More sharing options...
D@n Posted March 8, 2017 Share Posted March 8, 2017 @rb251415, Shouldn't senb be on JB4/B16? According to both the AMP2 specification and resource page, pin 3 is not connected to anything. Dan Link to comment Share on other sites More sharing options...
rb251415 Posted March 8, 2017 Author Share Posted March 8, 2017 BINGO! That was it! I'm a little embarrassed that I read that so wrong! Thank you! Next question...Can this also be used for integer values or do I need a std_logic_vector? Link to comment Share on other sites More sharing options...
D@n Posted March 8, 2017 Share Posted March 8, 2017 @rb251415, You'll need to do some work to convert the integer values you wish to send into the logic values. That's part of the purpose of the controller I cited earlier. It allows me to send 16-bit integer values to the device, even though the device only outputs a single bit at a time. Perhaps you might wish to read through fpga4fun's discussion of pwm audio? Dan Link to comment Share on other sites More sharing options...
rb251415 Posted March 8, 2017 Author Share Posted March 8, 2017 Thanks again! I will review your info,... and probably be back with more questions. Have a GREAT DAY! Link to comment Share on other sites More sharing options...
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