Schematic for original Arty missing USB connector and FTDI chip

[TimC]

I have an original Arty board that I purchased years ago and never did anything with.  I'm about to do so now but discovered that the schematic I have, and the one available on the web page for the original Arty (not A7, S7 or Z7) does not show the USB port or FT2232 chip and all the associated components and nets.

The schematic I have is C.1. What would be sheet 10 is blank except for "This Page Intentionally Left Blank". In the Bookmarks sidebar there is a Sheet 10, with a subheading Components, under which are a bunch of refdes numbers including IC8, which is the FTDI chip on my board. This leads to the conclusion that sheet 10 used to show the USB components but that they have been removed. I also have schematic C.0 which has the same issue.

The reference manual downloaded from the same page, and having an approximately 2 year newer date, talks about the USB port and USB chip to a significant extent.

My board has a sticker with D754100, and printed on the board is PB200-319 Rev C

So the questions are: Why are they missing from the schematic? Is there a version of the schematic that shows these parts?

[zygot]

For the umpteenth time... ( do a search of the Forums to see how many people have asked the exact question ) NO, Since going to the FTDI USB bridge for configuration and UART connectivity, Digilent has omitted this interface from it's schematics. There isn't a good reason for this as there's nothing particularly imaginative going on. Perhaps, a few people are willing to pay for the privilege of using the "Digilent JTAG" that the Xilinx tools recognize.

Some historical context. A long time ago, Digilent made JTAG modules. Xilinx even used these on its Xilinx branded FPGA boards like the KC705. Curiously, Digilent never used them on any of its own FPGA boards. The Spartan boards used the Cypress USB bridge that had an embedded ARM processor. At that point the "Digilent JTAG" was more of a software thing than a specialized interface. When the Series 7 boards came out, Digilent went to the FTDI bridge devices like the FT2232. Cheaper and no programming. The Digilent JTAG interface is merely a few bytes of EEPROM these days. There are a couple of small details that anyone can work out.

Unfortunately, clipping information out of published schematics seems to be a Digilent thing now, having migrated to its Zmods.

If Anyone at Digilent has a good reason for slighting their customers by doing this, no one is talking. For what it's worth, some vendors don't publish any schematics their FPGA boards. Not even a hint about how to turn LEDs on or off properly.

You say that your Arty is not an A7 or S7 or Z7? Really? What FPAG device is on it? Edited November 12, 2023 by zygot

[TimC]

I apologize for wasting your time by not doing a through search before I posted.  I should have done so.

What I meant by not A7, S7 or Z7 is that it is not of the current generation of boards that are called the Arty A7, Arty S7, or Arty Z7. It is just called Arty, and has an A7 FPGA.

Thanks for your "historical context". It's downright bizarre paranoid behavior on Digilent's part.

[zygot]

No, I'm not frustrated with you asking the question, I'm frustrated with Digilent's lack of honesty and responsibility in dealing with a problem that keeps appearing so often in their forums. But do search the forums for posts about this topic as you might learn something interesting and useful.

Only I can waste my time, though on occasion I get suckered into an exchange that I'd have avoided if I knew how it would evolve. Even then, it's not a waste of time, just an avoidable episode. No one makes be spend the time to post to threads, though a few people have tired to prevent me from doing so. Your post doesn't fit that category.

Once upon a time, Xilinx and Digilent had a key relationship. Digilent provided cheap design resources for Xilinx or distributor FPGA boards, and Xilinx used Digilent's JTAG interface, even incorporating it into their tools. Both the times and the companies have changed since then, though the tools still recognize a "Digilent JTAG". Altera had it's Byte Blaster in various forms that for a long time is based on FT2xxx bridge devices. There are a lot of issues with Windows or Linux getting confused between a "Byte Blaster" interface and an COM device. Mostly, the problem can be traced back to FTDI; now that's a company that the terms "bizarre and paranoid" might be connected with. Edited November 13, 2023 by zygot

[TimC]

Thanks for the info.

[asmi]

If you need exact schematics which Digilent implemented, then you aren't going to get it unless you license it from them for (presumably) big $$$.

But if you want this schematics because you want to incorporate something similar into your designs, attached is a schematics of a module which does the job. It's a bit overbuilt because of my somewhat unusual requirement of UART working at a different voltage level than JTAG interface, also the USB side of things is powered by USB while voltage translators are powered by the board, also voltage translators outputs are held in tristate until you actually open a connection to the FT device via Vivado Hardware Manager - this is to ensure that this submodule will not interfere with other JTAG programmers as I also had a TagConnect footprint on the destination board, finally this design is a prototype subcircuit and so there are some extra parts I needed for debugging/experimentation. If config interface of your FPGA is powered by 3.3 V and you won't have any other JTAG programmers on the bus, you can delete voltage translator, same goes for UART - the one coming out of FT2232 is at 3.3 V logic level, so if it's fine with your application, you can get rid of UART translator too. Also please note that parts choice was made for a somewhat compact layout, and so some parts used are very small, but there is plenty of substitute parts in all kinds of packages. And I also use USB Type C connector instead of micro-USB because, well, it's year 2023, and nobody uses micro-USB anymore in new designs.

I've designed, assembled this design and verified the functionality, because this was meant to be a part of a much larger design, and so I wanted to retire some design risk by making such prototype. In order for this module to be recognized by Vivado and Vitis, you will need to follow instructions outlined here: https://docs.xilinx.com/r/en-US/ug908-vivado-programming-debugging/Programming-FTDI-Devices-for-Vivado-Hardware-Manager-Support Feel free to ask any questions you may have.

And just to make it absolutely clear - this is my original design, it's not any kind of reverse-engineering, or copy-paste, or whatever. It was inspired by Xilinx documentation, as well as a reference design of VCK190 (which Xilinx itself mentions as example) - even though it uses an FT4232 device, which works a bit differently, but also some of my original research and experiments with FT2232 breakout module by FTDI.

FTDI Xilinx JTAG.pdf

[zygot]

So there it is. Asmi has produced the definitive answer to the Digilent FTDI configuration/UART mystery. If you want to make your own FPGA board design you don't need to license anything from anyone. If you buy a Digilent FPGA board, you deserve to have complete schematics.

Bookmark this thread.

May this little "scam" rest in peace. Edited November 14, 2023 by zygot

[asmi]

14 hours ago, zygot said:

So there it is. Asmi has produced the definitive answer to the Digilent FTDI configuration/UART mystery. If you want to make your own FPGA board design you don't need to license anything from anyone. If you buy a Digilent FPGA board, you deserve to have complete schematics.

I was far from being the first one to do it. Infact anyone could've done that any time since Xilinx published a tool to program FT devices to be recognized by their IDEs (which IIRC happened around the middle of a last year). I only recently finally got around to it since I was working on a fairly complex board with A100T and an SODIMM DDR3 slot for 64-bit memory interface, which ended up being a 10 layer board, and so I didn't want to risk designing it from the get-go without prototyping USB-JTAG subcircuit first as a single PCB proto run (5 boards) was about $250 delivered, and two days for me to manually assemble it (one day per side, each side contains about 250 components, most of them small 0402 resistors and capacitors), and of course the BOM cost for a single board is also significant enough for me.

BTW if anyone is curious to see the full schematics for this board, you can download a PDF here: https://www.eevblog.com/forum/fpga/planningdesignreview-for-a-6-layer-xilinx-artix-7-board-for-diy-computer/msg5134983/#msg5134983 There is also a photo of the board.

Edited November 15, 2023 by asmi