222mzb Posted September 8, 2023 Share Posted September 8, 2023 For a project, I need to store some data, each has 128bits. I want to save that data in the memory of Basys 3 FPGA and when my DUT runs, I want to use that data one by one. How can I do that? Link to comment Share on other sites More sharing options...
0 artvvb Posted September 12, 2023 Share Posted September 12, 2023 Hi @222mzb There are a few different ways to go here depending on how you're setting up your project, but, assuming you're working with Verilog source files, you can describe a memory and fill it with data using commands like readmemh. See here: https://projectf.io/posts/initialize-memory-in-verilog/. Whether this is implemented using block RAM or some other form of memory will depend on how the tools choose to go with it. Thanks, Arthur Link to comment Share on other sites More sharing options...
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222mzb
For a project, I need to store some data, each has 128bits. I want to save that data in the memory of Basys 3 FPGA and when my DUT runs, I want to use that data one by one. How can I do that?
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