I am curious, whether and how it is posible to increase the (Linux) clock frequency from 1.2gHz to 1.5gHz -
as the xilinx chip can execute that fast.
Are there limitations - like cooling - which would inhibit the freqnency increase -> what are the reasons to limit the clock frequency down in an eval board?
thanks in advance,
DrGuenter
PS: Background - we are executing core mark pro (https://github.com/eembc/coremark-pro/) benchmark tests - and would love to see the full range - even if the cooling concept should be modified.
Question
DrGuenter
Hello everybody,
I am curious, whether and how it is posible to increase the (Linux) clock frequency from 1.2gHz to 1.5gHz -
as the xilinx chip can execute that fast.
Are there limitations - like cooling - which would inhibit the freqnency increase -> what are the reasons to limit the clock frequency down in an eval board?
thanks in advance,
DrGuenter
PS: Background - we are executing core mark pro (https://github.com/eembc/coremark-pro/) benchmark tests - and would love to see the full range - even if the cooling concept should be modified.
/sys/devices/system/cpu# cat cpufreq/policy0/cpuinfo_max_freq
1199999
/sys/devices/system/cpu# cat cpufreq/policy0/scaling_available_frequencies
299999 399999 599999 1199999
WORKLOAD RESULTS TABLE
MultiCore SingleCore
Workload Name (iter/s) (iter/s) Scaling
----------------------------------------------- ---------- ---------- ----------
cjpeg-rose7-preset 142.86 36.50 3.91
core 1.02 0.25 4.08
linear_alg-mid-100x100-sp 48.26 12.55 3.85
loops-all-mid-10k-sp 1.89 0.65 2.91
nnet_test 3.10 0.93 3.33
parser-125k 20.51 8.33 2.46
radix2-big-64k 134.14 82.20 1.63
sha-test 238.10 70.42 3.38
zip-test 75.47 20.00 3.77
MARK RESULTS TABLE
Mark Name MultiCore SingleCore Scaling
----------------------------------------------- ---------- ---------- ----------
CoreMark-PRO 2682.54 851.67 3.15
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