I'm trying to generate a DDR controller for the Genesys 2 board but I can't find a XDC file that show the FPGA-DDR pinout. I saw a post to the forum that indicated that if the board configuration file was installed, the pinout would be filled in for you. The board configuration file is installed, no pinout was displayed. Can someone send me an XDC file (or segment of an XDC file) that shows the pin mapping to the DDR memories. Thanks,
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I'm trying to generate a DDR controller for the Genesys 2 board but I can't find a XDC file that show the FPGA-DDR pinout. I saw a post to the forum that indicated that if the board configuration file was installed, the pinout would be filled in for you. The board configuration file is installed, no pinout was displayed. Can someone send me an XDC file (or segment of an XDC file) that shows the pin mapping to the DDR memories. Thanks,
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