A tiny confusion about Pmod Header JB pin constraints

[HomaGOD]

Hello, all professionals

There are 12 pins of every Pmod interface, but I discover only 10 of 12 pins are constrained to FPGA(as is described in the following screen-capture). Does that mean that the remaining two pins are not connected to FPGA? 

 

[thinkthinkthink]

Only 8 pins are connected to the FPGA, pins 6 and 12 are VCC_3V3 while pins 5 and 11 are GND.

[HomaGOD]

1 hour ago, thinkthinkthink said:

Only 8 pins are connected to the FPGA, pins 6 and 12 are VCC_3V3 while pins 5 and 11 are GND.

I see. Thank you for your reply.