I am trying to setup DDR2 using the Xilinx Memory Interface Generator using Vivado 2017.2 for the Nexys 4 DDR board.
I am currently at the stage were I am prompted to select Pin/Bank Selection Mode:
1. New design: Pick the optimum banks for new design
2. Fixed Pin Out: Pre-existing pinout is known or fixed
I am not sure what to choose. I have seen a lot of web forums that suggest using the second option and downloading the MIG ucf file. I tried this method but the Xilinx Memory Interface Generator in Vivado 2017.2 keeps crashing after I select the second option.
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George Onwubuya
I am trying to setup DDR2 using the Xilinx Memory Interface Generator using Vivado 2017.2 for the Nexys 4 DDR board.
I am currently at the stage were I am prompted to select Pin/Bank Selection Mode:
1. New design: Pick the optimum banks for new design
2. Fixed Pin Out: Pre-existing pinout is known or fixed
I am not sure what to choose. I have seen a lot of web forums that suggest using the second option and downloading the MIG ucf file. I tried this method but the Xilinx Memory Interface Generator in Vivado 2017.2 keeps crashing after I select the second option.
Any assistance would be highly appreciated.
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