Devaraj Posted July 25, 2019 Share Posted July 25, 2019 hello, i am planning to hookup the 4x4 pmodKEYPAD with ML605 FPGA LVDS I/O pins of vertex6 FPGA , anyone could you please suggest how to interface...also can LVDS pins can be used as GPIO? Link to comment Share on other sites More sharing options...
jpeyron Posted July 25, 2019 Share Posted July 25, 2019 Hi @Devaraj, Welcome to the Digilent Forums! For the Pmod KPYD the rows are driven logic high and the columns are left floating and driven low when the corresponding button is pressed. As long as LVDS LVCMOS18 can overcome the pull ups there should not be an issue. You might want to drive the floating columns high using the pull-up iostandard in the ucf file. Here is the resource center for the Pmod KYPD. There are VHDL and Verilog examples for using the Pmod KPYD that should be helpful as well. best regards, Jon Link to comment Share on other sites More sharing options...
Devaraj Posted July 26, 2019 Author Share Posted July 26, 2019 Hi Jpeyron, Thanks for your response.. regards Devaraj Link to comment Share on other sites More sharing options...
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Devaraj
hello,
i am planning to hookup the 4x4 pmodKEYPAD with ML605 FPGA LVDS I/O pins of vertex6 FPGA , anyone could you please suggest how to interface...also can LVDS pins can be used as GPIO?
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