Jump to content

DisplayPort implemented in Verilog.


Recommended Posts

I've been working on my first large FPGA project in a long while, implementing DisplayPort in Verilog, using the Nexys Video as my development platform.

I've got it working, and better than that I've got the standard 720p resolution working, and tomorrow I should have 1080p working too. Currently it uses 800 LUTs and 700 FFs, and 1 BRAM.

If interested you can follow along or help with development at https://github.com/hamsternz/DisplayPort_Verilog



Link to comment
Share on other sites


This topic is now archived and is closed to further replies.

  • Create New...