AXI SPI

[newkid_old]

Has anyone been able to get the chip select output on the AXI SPI block working?  I've tried the example code and other things I've found on line but no such luck.  I've even tried different outputs from the block thinking it was just labelled wrong.

 

ConfigPtr = XSpi_LookupConfig(TI_Amp);
    if (ConfigPtr == NULL) {
        xil_printf("Device not found\n\r");
    }
    else
    {
        xil_printf("Found SPI module\n\r");
    }
    delay(1000);
    Status = XSpi_CfgInitialize(&Spi, ConfigPtr, ConfigPtr->BaseAddress);
    //Status = XSpi_Initialize(&Spi, TI_Amp);
    if (Status != XST_SUCCESS) {
        xil_printf("SPI failed config\n\r");
    }
    else
    {
        xil_printf("SPI config set\n\r");
        XSpi_Reset(&Spi);   //Stop the device if already on
    }
    delay(1000);

    Status = XSpi_SelfTest(&Spi);
    if (Status == XST_SUCCESS) {
        xil_printf("SPI self test passed\n\r");
    }
    else if(Status == XST_REGISTER_ERROR)
    {
        xil_printf("SPI failed to write to register\n\r");
    }
    else if(Status == XST_LOOPBACK_ERROR)
    {
        xil_printf("SPI failed loopback\n\r");
    }

    delay(10);
    while(Status != XST_SUCCESS)
    {
        Status = XSpi_SetOptions(&Spi, XSP_MASTER_OPTION | XSP_LOOPBACK_OPTION | XSP_MANUAL_SSELECT_OPTION);
    }

    delay(10);   

    XSpi_Start(&Spi);

    XSpi_IntrGlobalDisable(&Spi);

    while(1)
    {
        xil_printf("Hello World\n\r");
        //XSpi_WriteReg(SPI_BASEADDR, 0x03, 0x50);  //Writes to address 0x50
                                                 //a value of 6
        //XSpi_Transfer(&Spi, writeBuffer, readBuffer, 1);
        XSpi_WriteReg(&Spi, 0x03, 0x50);
        delay(10000);
        readValue = 5;

        xil_printf("%u\n\r", readBuffer[0]);
    }

 

Here's my code.  I can see the SPI_Out and SPI_CLK lines doing there job but not the SS_0 line which is supposed to be the chip select.  Any help is greatly appreciated.

[jpeyron]

Hi @newkid_old,

You should be only using the T pins on the AXI QUAD SPI output. Here is the vivado library that has many AXI QUAD SPI IP Core examples such as the Pmod ACL, Pmod ACL2, Pmod AD and the Pmod CLS IP Cores. These IP Cores should be a good reference for your project. What FPGA development board are you using? 

thank you,

Jon

 

[newkid_old]

I'm using the CMOD-A7.  I've mapped the signals to the JA header.

[jpeyron]

Hi @newkid_old,

If you use the digilent board files for the Cmod A7 here you could use one of the Pmod IP Cores that use the AXI QUAD SPI IP Core found in the vivado library here with JA Pmod Port.  What version of Vivado are you using?

thank you,

Jon

[newkid_old]

I'm using 2017.3

[jpeyron]

Hi @newkid_old,

Here is a completed project in Vivado 2017.3 using the Cmod A7 35T , Digilent board files, JA and the Pmod JSTK2 (here). The Pmod JSTK2 IP Core is in the vivado library here  which has a standard spi connection.This project should be a good reference for your current project. What device are you trying to connect to?

thank you,

Jon

[newkid_old]

TI's LMH6681 Op amp is my target device.  I am designing a board for my company that will use 3 of them.  I picked up the CMOD to see if I could just talk to one for starters.

[JColvin]

Hi @newkid_old,

In terms of getting the Cmod A7 to work with the LMH6881 (I presume LMH6681 is a typo since I can't find that part on TI's website), the Cmod is compatible with it in terms of logic levels and required clock speeds.

I don't know if you were planning on using the chip directly or the evaluation board version, but do note that if you are using the evaluation board, the SPI signals on their 2x7 header are not in the same physical order that our SPI IP we use (such as the one Jon linked you to), so if you were hoping for a direct connection to the Cmod A7, you would need to individually route the signals or redesign the IP to have the signals on the required pins for the LMH6881.

Thanks,
JColvin