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Debugging a custom ZYNQ PCB without PS UART routed


tbrowning

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Hello,

I am currently working on a project involving a custom ZYNQ PCB that was designed as a smaller version of the ZYBO Z7-20 board as part of a PCB class I taught at the University of Delaware. We got our boards back mid-April and have been testing them since.

The board consist of the following features:
- Dual HDMI (reconfigurable TX/RX with Digilent DVI cores)
- 3 PMOD headers (1 high-speed, 2 general purpose)
- 4 switches, 8 LEDs for GPIO
- JTAG
- SD
- Flash
- DDR

So far everything besides the memory systems have been tested (SD/Flash/DDR); however, I made one huge mistake with the board - not routing the UART RX/TX signals from the PS. This has made debugging the memory systems particular difficult since almost every example project I have come across uses UART as feedback for the tests run (For example, the SDK DDR memory test sends the results back over UART). 

I am looking for suggestions as to how to proceed with my testing. From the digging around I've done so far it seems like it should be possible to route the PS UART to EMIO pins and then to the PL side of the ZYNQ and out over one of my PMOD headers, but searching for similar designs always leads to people suggesting to just use the UART on the PS which I don't have available. If more details are needed I can post them, but any help would be greatly appreciated!
 

P.S. This board will be a stepping stone towards another revision of a ZYNQ PCB that will be used to transmit data to a custom projector system and the purpose of designing this board for the class was to test different memory configuration before adding them to the production version of our ZYNQ PCB so I would like to test this before beginning my next design.

Best,
Tyler

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I was able to get both of the methods I tried yesterday working this morning.

Here is a short summary of my solution:

1) Created the block design using the ZYNQ PS with UART_1 enabled and an AXI UARTLite stream connected (see bd.png)

2) Modify the ZYNQ PS to send UART_1 to EMIO pins (see psconfig.png)

3) Modified the xdc file to route the 4 UART signals to the JC PMOD on the Zybo Z7. I also added a switch to turn on an LED for easier debugging (see xdc.png)

4) Set up a FSBL and HelloWorld application projects in SDK (see sdk.png)

5) Redirected stdin/stdout in the BSP settings. I had the FSBL project write out of UART_1 and the HelloWorld project write out the AXI UART and both worked! (see bsp.png)

 

Next up I will be recreating this project on my custom PCB to see where the FSBL fails now that I finally have a UART configured! Thanks for the help again @jpeyron, the forum you linked ended up showing me how to correctly redirect the stdin/stdout ports for the UART

bsp.PNG

sdk.PNG

xdc.PNG

ps-config.PNG

bd.PNG

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Hi @jpeyron,

Thanks for the quick reply!

I have tried playing around with this a bit; however, the forum you linked is using the MIO pins and the JF PMOD header which is already routed to the PS side of the Zynq. I was able to use this method for the Zybo board I have, but I would not be able to do this test with my custom PCB since none of the PMOD headers are connected to the PS side of the Zynq.

For my first test I want to get UART1 connected to EMIO pins and then whatever logic is needed inbetween to route it out to the JC connector which is on the PL side of the Zynq. I tried just connecting UART_1 from the ZYNQ7 processing system straight out of my block design then I modified the xdc file to connect the signals to the JC PMOD pins, but I was unable to get any data out after running the project. I suspect it is more complicated than that and I also wasn't sure what modification were needed in SDK. 

Another test I am working on now is to use the axi_uartlite IP to create a UART bus out to the PL side, but I'm not sure what modification would be needed in SDK to get any printf statements directed to this channel for debugging purposes.

If anyone has any other suggestions I would be happy to try them instead.

Thanks,

Tyler

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Following up on my post earlier:

I was able to convert both projects to run on my custom Zynq PCB, but both of the projects failed to print out over UART still. I was able to get the LED working from the switch I addedto the design, but none of the PS code was running.

Upon further investigation I found a big issue with the board: it is missing the PS_POR_B signal.

I am not 100% sure that this is related to the PS project failing, but I'm not really sure what the function of the pin is other than a reset on power up and power down. Could anyone explain how this pin is suppose to function? I found a small section on it in UG933 pg. 57 (https://www.xilinx.com/support/documentation/user_guides/ug933-Zynq-7000-PCB.pdf). Is this a show stopper for the PCB? If I was able to get a rework wire to this pin would it just need to be tied to a power good signal or can it just be tapped to a ground pin?

@jpeyron Do you know if anyone could help me debug this issue? Should I hope over to the Xilinx forums?

Thanks in advance

-Tyler

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Hi @tbrowning,

I'm not certain if you would just be able to add in the PS_POR_B signal with a pull-up resistor and a way to assert it to GND and be good to go; that is a bit beyond the scope of our Forums, so you would most likely receive more helpful answers regarding this on the Xilinx forums.

Thanks,
JColvin

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Hi @tbrowning,

I suggest to take a look at the User guide here and related carrier card hardware guide. It is an example of well thought design and contains answers to you questions.

In my opinion I would cut losses and make a new board or just use commercial one like described in the link.

 

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