jpeyron

Hi @harika,

We ask that you post questions on the forum so others that might have similar questions can benefit from the thread. Here is the zedboard resource center. Make sure that you have installed the digilent board files and the you select the digilent board file when creating a zedboard project. Here is a tutorial on using IP Cores.

thank you,

Jon

Thank u for the reply, But actually in zedboard  DD3SDRAM Peripheral  is  PS part one, so for zedboard if we go for MIG port the output is as shown in picture1. So, for this i refered to ug586_7series_MIS.pdf-xilinx UG586 7 series fpga memory interface solutions v1.9 and v1.9a userguide.

        I found that in MIG block with DD3SDRAM  output it will be like in picture2. But in your videos there is extra clk that is in block of MIG with output DD3SDRAM shown in picture3,  how can we insert that.