Ppspendse

Hi, I am also trying to simulate DVI2RGB IP and having a similar issue. did you find any way to work it arround?. if yes could you mind sharing solution?

is it possible for you to give a vhdl source code that would generate tmds data and clock, so that I feed it to my dvi to rgb block and check for data flow?

Yes the rgb gen and rgb to dvi are working and the datapath through dvi to rgb is not working.. I will share the updated design now. rgb_gen.vhd

Hi Arthur, Thanks for your inputs. so you mean to say that the block doesnt have provision to simulate and test ?. my example project is checking the two IPs rgb to dvi and dvi to rgb. in doing so i have come up with a technique. I am generating TMDS output from the rgb to dvi ip. but when I connect my tmds clk and data of rgb to dvi ip to dvi to rgb ip clks get generated but i can not see the rgb data getting generated back.any help would be appriciated. Thank you, Purushottam

Hi, I am trying to simulate the DVI2RGB IP. I am new to this DVI signalling parameters, can anyone provide me any example projects to simulate and understand the data flow and clk parameters. Thanks in advance