attila

Hi @Alejandro-Dev With clock stretching option enabled only the first DIOs can be selected and all these will be used/driven for I2C state machine. For Digital Discovery with 32Ki sample Pattern Generator buffer the first 15 DIOs, for Analog Discovery with 1Ki the first 10 DIOs... can be used Without FDwfDigitalI2cStretchSet any DIO can be used.

Hi @AlanB It is fixed in the latest version: Thank you for the observation.

Hi @dave slagle I was still unable to reproduce the issue. In the latest version I've tried to make some changes that may have relation to this but I see 3.18.14 didn't fix it. The issue may be related to this unsolved bug: https://forum.qt.io/topic/104804/qt5-hanging-crashing-problems-when-window-is-not-active-on-macos

Hi @Clonsingle In Logic Analyzer you can use Record Mode and Event View or File/Export; or Protocol/SPI/Spy and increase Max Lines under View menu.

Hi @rkuerbis The USB stick filesystem may be corrupt or unsupported. Please try using another USB flash drive and always eject/safe-remove it from the computer to prevent fs corruption. Here you can find the latest Linux image: https://digilent.s3.us-west-2.amazonaws.com/Software/Instrumentation/Linux/img.11.zip

Hi @AlanB Yes, it can be used together with Logic Analyzer. The play data is aligned to the end of the DDRam and record data to the start. If the record overtakes the play it will generate bad data. Make sure the record to play start is less than the 256MiB-playdata and the record bitrate is less or equal to the play.

Hi @rkuerbis See the WaveForms Help and the following page: https://digilent.com/reference/test-and-measurement/analog-discovery-pro-3x50/recover-linux-mode You can use the terminal and reset button to stop the boot process then reprogram the Linux image.

Hi @ssm Install digilent.adept.runtime and digilent.waveform arm64 build https://digilent.com/reference/software/adept/start https://digilent.com/reference/software/waveforms/waveforms-3/start https://forum.digilentinc.com/topic/8908-waveforms-beta-download/

Hi @Marc_X Use the Record mode in Logic Analyzer to capture more samples or the Protocol tool SPI/Spy if you are interested in the transferred data and not the signal timing.

Hi @AlanB Each digital-out (pattern generator) wire can be configured to generate independently a pulse or a custom pattern at a different rate, length... With the Digital Discovery up to 32Ki samples for each wire. With the Play mode a digital pattern of 1, 2, 4, 8 or 16bit wide and up to 256MiByte can be downloaded to the device DDRam and generated at up to 100MHz. This will be output at the same rate on 1,2,4,8or16 consecutive wires.

Hi @Merchello On Digital Discovery and ADP3450/3250 the digital IO voltage is adjustable between 1.2V and 3.3V, input logic threshold ~0.5V to ~1.5V These devices are also equipped with voltage level shifter for 5V input signal compatibility. The Analog Discovery 2 has fixed 3.3V high digital IO output, logic threshold ~1.5V. It has optional configurations for 0.5V input logic threshold suitable for 1.2V input signals. The output voltages can be adapted to 1.2V with external level shifter or resistor voltage divider.

Hi @Marc_X Could you attach a screenshot?

Hi @AlanB See the WaveForms application Help and for custom application the SDK / samples/ py/ DigitalDiscovery_Play.py DigitalDiscovery_PlayRecord.py DigitalDiscovery_RecordToFile.py DigitalDiscovery_RecordToFile16.py It can be used at up to 100MHz and 100M samples.

Hi @Rohit_Verma See the examples WF SDK / samples/ py/ DigitalOut_Pulse.py DigitalOut_Pins.py DigitalOut_Duty.py DigitalOut_Phase.py ...

Hi @mSlider

Hi @mSlider 1,3. It is solved for the next release. 2. You will be also able to select between: device specific wire, custom or no pin color. Thank you for your observations.

Hi @trosen Try reinstalling digilent.adept.runtime https://digilent.com/reference/software/adept/start

Hi @mmolter775 Yes, you could add (new Date()).toISOString()

Hi @Fortune I've sent you instructions in private message.

Hi @leonvs

Hi @leonvs It will be immediately fixed in WF 3.18.13 Thank you for the observation.

Hi @yogeshL The latest version adds JTAG support:

Hi @AnthonyP The logic threshold of digital inputs is at about 1.5V but the generated signal does not cross this level. Generate signal with 1.5V offset. In the 5th and 7th AD2 configuration the digital input threshold is at 0.5V.

Hi @dave slagle Could you post or send me your workspace and a screenshot from the application ?

Hi @Abhishek Prakash Yes, like this: DigitalIn_ScanScreen.py