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Since I have been able to connect the HS2, I am going to try this way too! Thank you again!

I don't really agree. In order to porgram the device, VIVADO has to know where it has to generate an output signal or where to get one. I know that it is possible to do it in this board. I was just searching answers for the J10 port configuration. Finally I manage to connect my HS2 and to establish communication via a PMOD. Nevertheless, I still think that if Diligent offers a J10 port, the user should be able to use it. And for that the information required with it. And thank you very much for your time and patience 🙂

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But I don't need the schematics if the constraint file is complete. It is frustrating.... What is the point to sell a JTAG HS connector if you can't connect it to the board because they don't provide more information?

I would like to use my HS2 because I need to use a ftdi in order to connect it to OpenOCD and then be able to debug with GDB. But what is the point of having a J10 port if you don't provide the pins' names add them to the contraint file and make it work?!

I actually have the Diligent HS2 ( sorry I forgot to mention that). That's why I am trying to connect it to the J10 port.

I tried to but the problem is that the pins of the J10 port specified in the datasheet and schematics are not in the constraint file provided by diligent ( here you can see the constraint file I am using : https://github.com/Digilent/Nexys-A7-100T-Keyboard/blob/master/src/constraints/Nexys-A7-100T-Master.xdc ) . and even if I write the pins names provided in the schematics they are not recognized by VIVADO. I am using VIVADO in windows and for the GDB, OpenOCD Ubuntu

Hello, I am currently working on synthesizing an open-source CPU based on the RISC-V architecture called NeoRV32. My goal is to be able to debug it using a JTAG interface. After successfully synthesizing and implementing it in VIVADO, the final step is to generate the bitstream. I have noticed in the datasheet and on the board itself that a JTAG port is present. However, when I enter the names of the pins provided in the electronic schematic, VIVADO does not recognize them. Additionally, I have checked the constraint file [https://github.com/Digilent/Nexys-A7-100T-Keyboard/blob/master/src/constraints/Nexys-A7-100T-Master.xdc ], and it seems that these pins are not present there either. I would like to gather more information about these peripherals and understand why VIVADO does not recognize them. If you could provide any insights or guidance on how to properly include these pins in the constraint file, I would greatly appreciate it. Thank you in advance for your assistance

I am writing to discuss a technical issue I have encountered while working on a project in the NEXYS A7 100t board. Specifically, I am facing difficulties in establishing a connection with the JTAG interface. Due to the fact that J10 ports are not being recognized by Vivado, I have resorted to using a PMOD to extract the signals for JTAG. I have connected the JTAG HS2 and modified the OpenOCD configuration file accordingly. However, I am currently unable to establish a successful connection. I have thoroughly reviewed my setup and configuration to ensure that all connections and settings are correct. Despite my efforts, I have been unable to resolve the connectivity issue. I have also consulted relevant documentation and online resources, but the problem persists. Here you can see the error and the configuration files. Thank you in advance for your time.